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MOSFET (Si/SiC) Forum Discussions

KUOWENYUNG
Level 3
Level 3
100 sign-ins 50 sign-ins 10 replies posted

Dear Sir,

I have question about Crosstalk in Totem Pole PFC.

In positive cycle, why the Vgs crosstalk of Q2 event just happen in SR Q1 turn on and turn off?  

PWM FET turn on / off no induce vgs crosstalk on vgs of SR FET Q1.

KUOWENYUNG_4-1670546194611.png

 

KUOWENYUNG_5-1670547133988.png

 

Green trace: choke current

purple: Vgs of Q2

yellow: AC line @ 90 dergee 

KUOWENYUNG_2-1670545909355.png

 

 

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1 Solution
Jingwei
Moderator
Moderator
Moderator
First question asked 100 replies posted 10 likes received

Hi,

Sorry for a late response. 

The first thing that I want to make sure is if the Waveforms of Q1 and Q2 markings are reversed.

The second thing is how you measured Vgs of G1. The source voltage of Q1 are not a constant, the measurement of Vgs, the deadtime setting and gate circuit design are the reasons for this crosstalk. Waveform of Q2 is relative clean. 

You can check the above reasons again, and do some improvements. 

BR,

Steven

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4 Replies
Xiangrui
Moderator
Moderator
Moderator
50 solutions authored First question asked 50 sign-ins

Hi,

To prevent from shoot through for half bridge, it's always turn off firstly and then turn on after so-called "dead time". This is why you find out that Q2 Vgs is always later than Q1 Vgs.

And for a "low side" switch Q2, when Q1 turn is off, Q1 takes all stress. This is why you find out that why Q2 Vds is similar with Q1 Vgs.

For these two reason you can see that this is always gap between Q2 Vgs and Q2 Vds.

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Dear Sir,

I still can't understand Vgs crosstalk just happens during low side of Q2 off and high side of Q1 switch on/off.  

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Jingwei
Moderator
Moderator
Moderator
First question asked 100 replies posted 10 likes received

Hi,

Sorry for a late response. 

The first thing that I want to make sure is if the Waveforms of Q1 and Q2 markings are reversed.

The second thing is how you measured Vgs of G1. The source voltage of Q1 are not a constant, the measurement of Vgs, the deadtime setting and gate circuit design are the reasons for this crosstalk. Waveform of Q2 is relative clean. 

You can check the above reasons again, and do some improvements. 

BR,

Steven

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Jingwei
Moderator
Moderator
Moderator
First question asked 100 replies posted 10 likes received

Hi,

Did you get the answer you want? Or do you need more support?

BR,

Steven

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