I am currently working with a FlexRay Evaluation Kit (https://www.fujitsu.com/downloads/MICRO/fma/pdfmcu/app_ug-910011-15-flex-fpga-eva-kit-369.pdf ). Does anyone know how to use the gateway program? Should it just work when two boards are connected, how do I tell if it is working?

Thanks,

Hello,

I am working with the FM4-176L-S6E2CC-ETH Starter Kit and the IAR embedded workbench IDE. I would like to use the serial timer function of the MFS Channels in CSIO mode (found that in the communication manual and in the PDL drivers), but I can not set any of the registers. Now i am wondering if this feature is maybe not available at all with my MCU.

More information:

MFS Channel 4, sending and transmitting works fine, same for setting interrupt and FIFO config.

All the relevant register values (CSIO_SACSR etc.) are shown as 0xFFFF

Thanks in advance for your help.

I'm currently working with a s6j32hel board, but since IAR (v 8.50) doesn't have that device i configured it with s6j32gel.

When a click 'Download and debug' it gives me the following warnings, how can this be fix?

Debug Log:

Mon Apr 06, 2020 11:19:39: IAR Embedded Workbench 8.50.1 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\bin\armproc.dll) Mon Apr 06, 2020 11:19:39: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\debugger\Cypress\S6J3200.dmac Mon Apr 06, 2020 11:19:39: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\debugger\Cypress\TRAVEO_DEBUG.dmac Mon Apr 06, 2020 11:19:39: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\flashloader\Cypress\FlashS6J3xx_TC128KB_S384KB.mac Mon Apr 06, 2020 11:19:39: Loading the I-jet driver Mon Apr 06, 2020 11:19:39: Probe: Probe SW module ver 1.65 Mon Apr 06, 2020 11:19:39: Probe: Option: trace(Auto,size_limit=25%) Mon Apr 06, 2020 11:19:39: Probe: Found I-jet, SN=88726 Mon Apr 06, 2020 11:19:39: Probe: Opened connection to I-jet:88726 Mon Apr 06, 2020 11:19:39: Probe: USB connection verified (11538 packets/sec) Mon Apr 06, 2020 11:19:39: Probe: I-jet, FW ver 7.2, HW Ver:B Mon Apr 06, 2020 11:19:39: Probe: IJET-ARM20 adapter detected Mon Apr 06, 2020 11:19:39: Probe: Versions: JTAG=1.85 SWO=1.40 A2D=1.73 Stream=1.50 SigCom=2.44 Mon Apr 06, 2020 11:19:39: Emulation layer version 4.61 Mon Apr 06, 2020 11:19:39: JTAG clock detected: 12MHz Mon Apr 06, 2020 11:19:39: JTAG chain "TDI->TAP#1[IR=5]->TAP#0[Cortex:IR=4]->TDO" verified. Mon Apr 06, 2020 11:19:39: Notification to init-after-power-up hookup. Mon Apr 06, 2020 11:19:39: Notification to core-connect hookup. Mon Apr 06, 2020 11:19:39: Connected DAP on JTAG. Detected DP ID=0x0. Mon Apr 06, 2020 11:19:39: Connecting to TAP#0 DAP APB-AP port 1 (IDR=0x24770002) to core Cortex-R5 r1p3 at 0x80090000. Mon Apr 06, 2020 11:19:39: Debug authentication: Mon Apr 06, 2020 11:19:39:   Non-secure invasive debug not implemented Mon Apr 06, 2020 11:19:39:   Non-secure non-invasive debug not implemented Mon Apr 06, 2020 11:19:39:   Secure invasive debug enabled Mon Apr 06, 2020 11:19:39:   Secure non-invasive debug enabled Mon Apr 06, 2020 11:19:39: Debug resources: 8 H/W breakpoints, 8 watchpoints, 1 context ID breakpoints. Mon Apr 06, 2020 11:19:39: CPU status OK Mon Apr 06, 2020 11:19:39: LowLevelReset(script, delay 200) Mon Apr 06, 2020 11:19:39: Calling reset script: ResetAndStopAtEndOfBootROM Mon Apr 06, 2020 11:19:39: ----- Prepare hardware for flashloader ----- Mon Apr 06, 2020 11:19:39: Disabling Caches... Mon Apr 06, 2020 11:19:39: Configuring and initializing TCRAM (128KB)... Mon Apr 06, 2020 11:19:39: Initializing System RAM (384KB)... Mon Apr 06, 2020 11:19:40: Clear WDT Mon Apr 06, 2020 11:19:40: Loaded debugee: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\flashloader\Cypress\FlashS6J3xx_TC128KB_S384KB.out Mon Apr 06, 2020 11:19:40: Target reset Mon Apr 06, 2020 11:19:41: Unloaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.4\arm\config\flashloader\Cypress\FlashS6J3xx_TC128KB_S384KB.mac Mon Apr 06, 2020 11:19:41: Downloaded C:\Users\rcorder1\Documents\IAR Embedded Workbench\Template 3200\arm\8.50.1\Cypress\s6j3200\S6J3260Evl\examples\template\TCFLASH Debug\Exe\template.out to flash memory. Mon Apr 06, 2020 11:19:41: 4272 bytes downloaded into FLASH (2.20 Kbytes/sec) Mon Apr 06, 2020 11:19:41: Loaded macro file: C:\Users\rcorder1\Documents\IAR Embedded Workbench\Template 3200\arm\8.50.1\Cypress\s6j3200\S6J3260Evl\examples\template\..\..\config\tcflash.mac Mon Apr 06, 2020 11:19:41: Disabling MPU and Caches... Mon Apr 06, 2020 11:19:41: Loaded debugee: C:\Users\rcorder1\Documents\IAR Embedded Workbench\Template 3200\arm\8.50.1\Cypress\s6j3200\S6J3260Evl\examples\template\TCFLASH Debug\Exe\template.out Mon Apr 06, 2020 11:19:41: LowLevelReset(software, delay 200) Mon Apr 06, 2020 11:19:41: Calling reset script: SoftwareReset Mon Apr 06, 2020 11:19:41: LowLevelReset(script, delay 200) Mon Apr 06, 2020 11:19:41: Calling reset script: ResetAndStopAtEndOfBootROM Mon Apr 06, 2020 11:19:41: 4272 bytes verified (245.40 Kbytes/sec) Mon Apr 06, 2020 11:19:41: Download completed and verification successful. Mon Apr 06, 2020 11:19:41: LowLevelReset(software, delay 200) Mon Apr 06, 2020 11:19:41: Calling reset script: SoftwareReset Mon Apr 06, 2020 11:19:41: Target reset Mon Apr 06, 2020 11:19:41: INFO: Configuring trace using 'Auto,size_limit=25%' setting ... Mon Apr 06, 2020 11:19:41: Trace: Using detected ETMv3 at address 0x8009c000 Mon Apr 06, 2020 11:19:41: Trace: ETMv3 is not powered-up (ETMCR=0x441) Mon Apr 06, 2020 11:19:41: Trace: ETMv3 powered-up OK (ETMCR=0xc40) Mon Apr 06, 2020 11:19:41: Trace: Access to detected ETMv3(architecture=3.3) initialized (CONF=0x8d254024, CTRL=0xc40, IDR=0x4104f230) Mon Apr 06, 2020 11:19:41: Trace: Using detected ETB at address 0x80001000, RAM size 0x1000 words (16KB) Mon Apr 06, 2020 11:19:41: Trace: Configured as 'ETMv3 to ETB' (SW ver:  Trace2=1.33 ETM=1.00 ETB=1.05 Deco=1.42) Mon Apr 06, 2020 11:19:41: Could not measure 'ITrgPwr' when ETM/ETB mode is active. Mon Apr 06, 2020 11:19:41: There was 1 warning during the initialization of the debugging session. Mon Apr 06, 2020 11:19:41: The stack pointer for stack 'SVC_STACK' (currently 0x00000018) is outside the stack range (0x00000A00 to 0x00000A80) Mon Apr 06, 2020 11:19:41: The stack pointer for stack 'IRQ_STACK' (currently 0x00000020) is outside the stack range (0x00000A80 to 0x00000B00) Mon Apr 06, 2020 11:19:41: The stack pointer for stack 'FIQ_STACK' (currently 0x00000028) is outside the stack range (0x00000B00 to 0x00000B80) Mon Apr 06, 2020 11:19:41: The stack pointer for stack 'UND_STACK' (currently 0x00000008) is outside the stack range (0x00000B80 to 0x00000C00) Mon Apr 06, 2020 11:19:41: The stack pointer for stack 'ABT_STACK' (currently 0x00000010) is outside the stack range (0x00000C00 to 0x00000C80)

I  write a Bootloader for a FM4 CY9BF368 with the Standard Frequenz of 160 MHz.

After I change the Program counter

_asm("LDR PC, [R0, #4]");         //Load new program counter address

the Firmware doesn't   start if it is compiled with the Frequenz of 8MHz.

If the Frequenz of the Firmware are change to 160 MHz it works.

Here are the different Settings at System_mb9b360r.h

CLOCK_8MHZ

APBC0_PSR_Val         ( 0x00000000ul)

APBC2_PSR_Val          ( 0x00000080ul)

SCM_CTL_Val              ( 0x0000002Aul)

CLOCK_160MHZ

APBC0_PSR_Val          ( 0x00000001ul)

APBC2_PSR_Val          ( 0x00000081ul)

SCM_CTL_Val               ( 0x00000052ul)

What going wrong ?

Can I change the Frequenz during the lifetime of the bootloader before I jump to the Firmware ?

Thanks,

Harald

Hello, ALL

     I am a new student, I need the MB9D560 SDK package.

     Who help me?  thank you !

     I need the  MB9D560 SDK, include the software driver and example.

     I need the EVB board,  How can I buy it.

Hello

i nedd to pragram a series of CY90F362TESPMCR microcontrollers. What serial programmers are available and at what cost?

Hi,

   客户使用698的AD口时，如果只是接上拉电阻，当上拉电阻为几K时，电压为5V，AD值也是正确的，如果上拉电阻接1M， 此时测量电压为4.5V，AD值大概为800多。请问这是为什么？谢谢！