Legacy microcontrollers Forum Discussions

I'm trying to determine the effort it takes to port our libraries to the XC888 (as far as applicable). Our formula student team uses and will continue to use the XC878, but several professors in automotive technology and mechatronics use the XC888 for teaching. So porting our libraries might benefit the teaching at the university. However I have several goals to achieve and only limited time, so I am forced to prioritize and for that I need to know what I'm getting into.

The XC888 has less XRAM and ROM than the XC878, but it has many of the same modules (except for the T2CCU), so it should be possible to port a lot of code.

What I need to know, though is which registers are at different addresses, which registers have different bits and whether registers are on the same pages.

A list would be optimal, but it's not what I'm looking for. What I'd like was someone to tell me a rough estimate of how much of a difference there is.

Maybe there even is a document about upgrading from XC888 to XC878 that contains such information. If so I have overlooked it and would appreciate a link. Show Less

Hi
I just try to make a device which will communicate with Linux PC as virtual serial port.
I already made CDC working under windows using the inf file, but it cannot be recognised by Linux - it show me new ttyASM0 device, but cannot connect.
Is there a way how to make it working? or I have to rewrite CDC class by myself ?
please help.
Thanks. Show Less

Videos here Show Less

1. How to configure USIC module for SPI functionality in slave mode? The SPI must accepting long solid frames 25*16 bits length.

2 The chip select input is grounded. Is there any ability to reset internal shift register state or enter end-of-frame command by SW?

This is useful in case of extra clock error on the clock bus.

Thanks in advance. Show Less

Hello everyone!

I have a problem when reading the ADC1 data with PEC at XC2765.
Only arbitration slot 1 of ADC1 is enabled. The ADC1 is configured to scan all available channels and write the result to RESRA0 register. PEC5 is configured to hanlde the register 0 interrupt (lev 11, group 1) and copy a word to an array of 5 words. The DEST counter is incremented after transfer. I do not use the autoscan mode. When program starts I start the convertion once. When PEC finishes the sequence (5 transfers) the ADC1 REG0 interrupt is called. In this interrupt I read the data from the PEC array, reload the PEC counter and start the convertion again. All these perfectly works for ADC0, but for some reason does not work for ADC1. With ADC1 after the start of convertion PEC performs a single sequence, then the IRQ is called, convertion is restarted, but the second sequence does not finish with the following symptoms: PEC counter stops at value 3, but the DEST counter shows that all five transfers were completed! As for me it looks like a hardware bug, but may be I do something wrong? May be there some timing issues between ADC & PEC and I can't start the convertion immediately after PEC counter change?

I've tried to enable the Autoscan mode. In this case everything works fine until I add the code to read the data from PEC buffer. After I enable this piece of code the stack overflow occurs due to multiple nested interrupts (as far as I concern). Probably in this case I does not manage to read all the data before PEC transfer takes place. But it's rather strange with 5us sampling time , CPU Speed 40MHz and ADC digital clock of 20MHz.

Here is my ADC1 IRQ handler routine (called only when PEC sequence is finished):

_interrupt(ADC1_SRN0INT) void ADC1_IRQAD0Done(void)
{

if((ADC1_EVINFR & 0x0100) == 0x0100) //Result0 event interrupt
{
ADC1_EVINCR = 0x0100; // Clear Result0 event interrupt

// USER CODE BEGIN (ADC1_viSRN0,20)

// read the PEC buffer in reverse order
for(i1=0; i1 ADC1_Mean[i1] += ( ADC1_PEC_Dest[ADC1_CHANNELS_CNT-i1-1]>>2 );

//--------------------------
//reload PEC
DSTP5 = ((uword)ADC1_PEC_Dest) & 0x00ffff; // reset the DEST address
PECC5 |= 0x0008; // load the counter

// software data reduction implementation
if ( adc1_decimation_cnt >= 255)
{
for(i1=0; i1 {
ADC1_Data[i1] = (uword)( ADC1_Mean[i1]>>8 ) ;
ADC1_Mean[i1] = 0;
}

// set software flag
ADC1_ConvDone = TRUE;

adc1_decimation_cnt = 0;
}
else
adc1_decimation_cnt++;

// Convertion restart.
// !!!!!!!!! Following two lines are disabled in ADC Autoscan mode.
ADC1_vStartParReqChNum( 1 | (1<<2) | (1<<4) | (1<<5) | (1<<6) ); // write CRCR1
ADC1_CRMR1 |= 0x200; // set load event

// USER CODE END

}

} // End of function ADC1_IRQAD0Done

The Tasking VX Lite v3.1 r1 is used.
DAVE 2.2 r2 is used to configure the peripherials.


--------------------------------------
Peripherial configuration detailes:

The ADC1 setup made by DAVE:
- only arbitration slot 1 is used (parallel), MasterMode, Permanent arbitration , Wait-for-start
- no Autoscan;
- all available analog channels enabled (0,2,4,5,6);
- all channels write data to register 0;
- register 0 generates an interrupt (lev 11, group 1), data reduction disabled.

PEC5 setup for ADC1:
- source addr is RESRA0 register of ADC1;
- destination register is an array of 5 unsigned int;
- counter is set to 5. After transfer the counter is decremented, SRC is not changed, DEST is incremented by word.
- EOP interrupt is not used


Hope for Your help.
Roman, Moscow, Russia. Show Less

Hello everyone!

I have two problems with breakpoints:
1. Breakpoints in some IRQ handlers does not trigger. For example, a breakpoint in MultiCAN MessageTransferred IRQ handler triggers normally, but the breakpoint in MultiCAN MessageObject->MessageReceived IRQ handler does not trigger. It's known for sure that the handler itself is called (I turn on the LED inside the handler routine).

2. OCDS build in XC2700 allows only 4 hardware breakpoints. Is it possible to set a software breakpoint using Tasking-VX Lite IDE? I've tried to do that using the "Add Tasking Breakpoint" command in Breakpoints view. Setting the breakpoint type to "Software" does nothing. If the number of BP greater than 4, only 4 first BP work.

Can anyone help? Show Less

We have built into our hardware a XC2287.* The length of the reset pulse on pin 138 (PORST) is currently 30ms. How long must be at least the impulse to a "safe" reset is performed?

Thank you Show Less

Dear Sirs!

I'm trying to tune the PLL in XC2765 microcontroller using DAVE 2. I want to use the external quartz (10MHz) and obtain the Fsys = 60MHz. As far as I concern it can be achieved using the following values of div/mult:
N = 24
P = 2
K2 = 2
this way the Fvco = 120MHz and VCO is operating in mode 1 (100 - 160MHz).
When I try to set the desired values of frequencies in DAVE I receive an error: "NDIV value is out of range. ..." (see attachment).
The question is: are the values of N,P,K2 given above correct? Can I use them to configure the pll manualy (without DAVE) or the DAVE is right and I can't use them for some reason? Show Less

Hi,

I had worked with Xc164 controller in that SYSSTAT ( System status Register) will indicates the status of the clock generation unit and the recent reset with a number of flags. Presently am working with XC2733 Controller in which am unable to find equivalent register for SYSTAT.

Could anyone help in finding out the equivalent register for SYSTAT in XC2733 ?

Thanks in advance

Regards

Sreekanth Show Less