Legacy microcontrollers Forum Discussions
There is following description about UART signal in FM4 Family Peripheral Manual Communication Macro Part ,CHAPTER 1-2: UART (Asynchronous Serial Interface) ,4. Baud Rate Generator.
"If an external clock is selected (BGR1:EXT=1), its HIGH and LOW signals must have a width at least of two bus clocks. "
Which of the following waveforms represents this description?
i am new to FM4-S6E2CC-pionner kit and i am trying to communicate (send a serial message from ) USB-HOST port of pioneer kit with present USB Device port but i am not getting any communication class for USB host to communicate in USB Wizard so which class i should use to solve my above problem or is there any reference example which could help me ??.
Thank you in advanceShow Less
MB9BF218TのEthernet-MAC AHB Mastaer interface はAHBクロックと同じ周波数で動作しているのでしょうか。
Is the Ethernet-MAC AHB Mastaer interface of MB9BF218T operating at the same frequency as the AHB clock?Show Less
i am working with FM4-S6E2CC Pioneer kit and trying communicate two controller via USB host interface but i done know how to do it so please do help me i have also tried USB WizardShow Less
Now I have a question when I set the stablization wait time of main clock. In the FM3_Peripheral_Manual_Main_Part_TRM, on page 53 "Access the Clock Satbilization Wait Time Register(CSW_TMR). Set the main clock oscillation stablization wait time.".But I check the code in pdL , as follows:
FM_CRG->SCM_CTL_f.MOSCE = 1u;
if(TRUE == bBlock)
while(1u != FM_CRG->SCM_STR_f.MORDY);
I think there is no use of "Access the Clock Satbilization Wait Time Register(CSW_TMR). Set the main clock oscillation stablization wait time."
Is that right?
About MB9BF124K, we downloaded FW though SWD by using EWARM, and went INITX to Low. We think the FW is going to start after INITX released. But the FW did not run although FM3 was reset.
We cheked whether FM3 was reset or not when INITX was Low. We decided that FM3 was reset because the program downloaded did not run and external liqued crystal did not also work.
Why dose not FM3 run after FW downloaded regardless INITX is Low?
[From ARM TRM]
I understood Debugger controls DHCSR.C_DEBUGEN and DEMCR.VC_CORERESET. if C_DEBUGEN is set to 1, core enter to debug mode and DHCSR.C_HALT is set to 1. Therefore, even if INITX is set to Low, during C_DEBUGEN = 1, C_HALT keep to 1. The result of this, CPU can not run because it stay in debug mode as long as C_DEBUGEN is not set to 0.
Best regards,Show Less