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Legacy microcontrollers Forum Discussions

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Hello community,

I've got a strange problem using the watchdog on a XC2238N controller.

For my system I don't want the Double WDT Reset to occur. Therefore I set RSTCON0 to 0xA000 and RSTCON1 to 0x0280, and I write 0x0008 to the WDTCS register to clear the internal reset flag every time the controller is started to prevent the prewarning mode.
Even if I do so the Double WDT Reset occurs and the controller is held in reset when the watchdog event is detected for the second time.

I've writte a small program which shows the problem. I use a LED at P2.9 which is low active. The program runs from address 0xC00000 in the internal flash.

PUSH R1
MOV R1,#080h
MOV P2_IOCR09,R1
BCLR P2_OUT_P9
EXTR #1
MOV SCU_RSTCON0,#0A000h
EXTR #1
MOV SCU_RSTCON1,#0280h
MOV R1,#08h ; Reset OE flag
MOV SCU_WDTCS,R1
POP R1

EINIT
JMPR cc_UC,0C00028h ; Force watchdog event to occur

Has anyone an idea of what's going wrong here?

Thanks for your help

ChristophMS
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3 Replies
ron
Employee
Employee
Hello,

There is an Errata which you should have a look into.

WDT_X.002 Clearing the Internal Flag which Stores Preceding WDT Reset
Request
The information that the WDT has already been exceeded once is stored in an
internal flag. In contrary to the documentation, that this flag can be cleared by
writing a 1B to bit WDTCS.CLRIRF at any time, clearing of the internal flag is only
possible, when the WDT is in Prewarning Mode.
Workaround 1
Applications following the proposal of Application Note AP16103 (section
`Using ESR pins to trigger a PORST reset`) to trigger a Power-on Reset upon
a WDT event will find the internal flag cleared upon the Power-on Reset and
thus will have no issue with this limitation.
Workaround 2
In case the WDT triggers a User Reset upon a WDT overflow, the internal flag
will not be cleared by the reset itself. Any further overflow of the WDT will lead
to a permanent reset of the device.
Applications which intentionally let the WDT exceed once, e.g. in conjunction
with an initial self test, might want to have the internal flag cleared to prevent a
permanent reset upon a real WDT overflow.
If the internal flag shall be cleared by software, this must be done as a reaction
on a WDT overflow in the time frame the WDT is in Prewarning Mode before the
permanent User Reset will be triggered. The CPU is notified upon the WDT
entering Prewarning Mode by issuing an interrupt request. The application can
react on this request and clear the internal flag now by writing a 1B to bit
WDTCS.CLRIRF e.g. within an ISR.
Workaround 3
Some applications may not want to use or rely on the interrupt logic in
conjunction with a WDT overflow event. The proposed remedy in this case is,
to initiate a Power Reset to clear the internal flag by changing the settings of the
active Supply Watchdog (SWD) as follows:
1. Disable SFR protection.
2. Write the inverted value of bit LxALEV to register SWDCON0, where x stands
for the number of the comparator which currently would trigger a Power
Reset.
In doing so, a Power Reset for VDDI_1 and VDDI_M will be activated clearing
the internal flag. The application may store information on preceding WDT
events in the Standby-SRAM. This can be done any time after the WDT reset
without timing limitations or the need to use the interrupt logic.
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How did you solve the problem?
I can't clear the internal WDT flag in ISR (prewarning mode) too.
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Hi sodolevsky,

To clear the WDT flag, there is a sequence of code you need to follow as the WDT flag is in the protected register.
To do so, you need the below code written in your pre-warning mode ISR.
    unsigned int uwPASSWORD1;

SCU_SLC = 0xAAAA; // command 0
SCU_SLC = 0x5554; // command 1

uwPASSWORD1 = SCU_SLS & 0x00FF;
uwPASSWORD1 = (~uwPASSWORD1) & 0x00FF;

SCU_SLC = 0x9600 | uwPASSWORD1; // command 2
SCU_SLC = 0x0800; // change to "Secured Mode"

uwPASSWORD1 = SCU_SLS & 0x00FF;
uwPASSWORD1 = (~uwPASSWORD1) & 0x00FF;
SCU_SLC = 0x8E00 | uwPASSWORD1; // command 4

SCU_WDTCS |= 0x0008; // Clear WDT flag
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