Not applicable
Dec 12, 2012
11:43 AM
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Dec 12, 2012
11:43 AM
1. How to configure USIC module for SPI functionality in slave mode? The SPI must accepting long solid frames 25*16 bits length.
2 The chip select input is grounded. Is there any ability to reset internal shift register state or enter end-of-frame command by SW?
This is useful in case of extra clock error on the clock bus.
Thanks in advance.
2 The chip select input is grounded. Is there any ability to reset internal shift register state or enter end-of-frame command by SW?
This is useful in case of extra clock error on the clock bus.
Thanks in advance.
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- IFX
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Jan 16, 2013
08:29 AM
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Jan 16, 2013
08:29 AM
Hello,
Did you try DAVE to generate the init code for the USIC working in slave mode? You should set the Word length to 16Bit. You can use a receive FIFO and trigger a Interrupt when reaching the filling level.
Why do you ground the CS?
Did you try DAVE to generate the init code for the USIC working in slave mode? You should set the Word length to 16Bit. You can use a receive FIFO and trigger a Interrupt when reaching the filling level.
Why do you ground the CS?