(MB9BF368N)Does reset being left HI or left low during power up is OK?

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gulec_2585086
Level 1
Level 1
5 questions asked First reply posted First question asked

We have using BMC to control reset of MCU. But BMC and MCU have difference main power.

So it cause a illegal reset level during power up.

pastedImage_2.png

We try to remove P3V3_A pull-up resistor (Figure 1) and P3V3_B pull-up resistor (Figure 2) get the difference result as attached waveform.

Does reset being left HI or left low during power up is OK?

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ShipingW_81
Moderator
Moderator
Moderator
500 replies posted 250 solutions authored 250 replies posted

Sorry for late reply.

I believe neither the P3V3_A and P3V3_B being pull-up resistor is Ok. Maybe you need a level translator to sync the power level of both ends.

Regarding to the level on INITX pin, please keep it low until internal RST release.

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