I am an ICT (in-circuit test) engineer, and trying to create a silicon nail
This means testing external Flash and RAM by accessing them by controlling
the Boundary Scan cells.
The TAP port signals (TMS, TCK, TDI, TDO, TRST) are driven directly by the
tester's digital drivers/receivers.
I can set the S6J32G into BS mode by driving MODE, SOT0, SIN0 ports to low
level at start - this is proven by the Infra tests being all OK, the IDCODE
being read correctly.
But when I try to use the outputs of the S6J32G, then nothing happens, I
can see with an oscilloscope that none of the outputs drive the signals.
It seems like the outputs are not enabled (no matter that the control cells
are set to the enable value).
The process is: first PRELOAD instruction, then the BS Data Register is
filled with the data pattern, then EXTEST instruction, then come the next
This process is very standard, it has worked with other BS-ICs.
Is there a special way for enabling the outputs of S6J32G?
Maybe I should set some values to IOCONTROL_REGISTER or IORMASK_REGISTER?
Thank you in advance, With best regards