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OlPe_282281
Level 2
Level 2
Welcome! 10 replies posted 5 replies posted

Hello,

with the manuals/documentation and PDL examples I try to write a controler for BLDC. The goal is to have 3 current channels and up to 6 further channels for e.g. temperature measurement hardware triggered.

The idea is to configure the MFT as up/down counter to generate the 3 PWM signals, or even 6 for High/Low side. At a given pointer after writing to the PWM cycle register, the ADC channel scan must be started using the MFT (FRT, OCU, WFG). This means, both must be configured properly. In ideal the DMA stores the channels and I'm able to use the samples to calculate physicals for further processing.

The reference manuals (Timer, Analog, etc.) shows what all is possible, but not how to. The PDL 2.1.0 has some examples which doesn't cover those, a lot of software triggered stuff - for my knowledge not really usefull. Further, the documentation mentions some examples which doesn't exist, e.g. from FM4 Peripheral Driver Library

chapter 7.2.3ADC Examples  adc_bt, adc_dma, adc_irq, adc_mft, ...

So, are there any up-to-date examples using the PDL useable here? How to test proper configuration with combining MFT, ADC via e.g. testing ISR etc? How to get samples in a fast manner without iterate over all scanned channels? (As I understood, the Adc_ReadScanFifo() reads out the fifo and I have to dispatch the u32 data, even emptying/iterating the fifo to get a specific scanned channel).

Attached my (non working) work-in-progress for these as IAR and eclipse (for editing) project, so other IDE like KEIL shouldn't have a problem.

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OlPe_282281
Level 2
Level 2
Welcome! 10 replies posted 5 replies posted

one part I can answer, see CDT 258050 Release Notes PDL 2.1.0, no Timer triggered ADC conversion... Is there really any support of FM4 at cypress?

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We would like to recommend you to adopt PSoC device for any new design, as the tech support resource is very limited for FMx device.

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