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mukrc_4108976
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First question asked

Hello All,

I am working on Atlas processor - to write protect the Sector 0 of TC flash alone.

We did the below settings

TCSDRn_PFPS0M0:WRITE0 = 0, MSDR_PCTRLM:TCPEN = 1

TCSDRn_SFPS0M0:WRITE0 = 0, MSDR_SCTRLM:TCPEN = 1

Would like to know is the settings are OK to write protect TCFlash Sector 0?

Please let me know your views. Appreciate your time.

Cheers

Murali

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Praveen
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Basically, the settings are correct.

Some additional information:

The complete security in the device is controlled by the entries in the Security Description Record which is stored in the TCFLASH (sector SA0 and SA1(interleaved)). EEPROM Flash contains another SDR which stores EEPROM Flash related security settings.

Two permission sets are supported by each Flash macro (Atlas device uses 2 TC Flash macros (macro A and macro B)), the Primary Permission Set (PPS) and the Secondary Permission Set (SPS) for e.g. to support software updates in a secure and easy way.

TCFLASH Primary Permission Key Marker (TCSDRn_PFPKM0~3) / TCFLASH Secondary Permission Key Marker (TCSDRn_SFPKM0~3) can be used to switch between the 2 permissions sets. If e.g. the permission key marker [0:126] match with SCCFG_TCFPUSRKEY [0:126] the permission set can be changed by SCCFG_TCFPUSRKEY [bit 127] during the application software execution.

If Flash permission set is disabled in SDR configuration (i.e. SCCFG_STAT0:IFPEN = '0' for TCFLASH and SCCFG_STAT0:DFPEN = '0' for EEPROM Flash), then Flash full (read, write, and execute) access is granted and Flash permission key comparison is also disabled.

Software can check the SCCFG_STAT0:IFPEN bit to know whether TCFLASH permission set is enabled or not

MSDR area: 0x017F0000 to 0x017F007F

TCSDR0 area: 0x017F0080 to 0x017F01BF

Note, permission and security configuration in SDR can be set to default by erasing the related Flash macro in parallel Flash programming mode.

Find more details in the Hardware Manual for FCR4 cluster series in chapter 5 (Security checker), chapter 9 (Tightly coupled flash) and chapter 14a (Boot Rom software interface)

Cheers
Praveen

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Praveen
Community Manager
Community Manager
Community Manager
5 likes given 250 sign-ins 100 sign-ins

Basically, the settings are correct.

Some additional information:

The complete security in the device is controlled by the entries in the Security Description Record which is stored in the TCFLASH (sector SA0 and SA1(interleaved)). EEPROM Flash contains another SDR which stores EEPROM Flash related security settings.

Two permission sets are supported by each Flash macro (Atlas device uses 2 TC Flash macros (macro A and macro B)), the Primary Permission Set (PPS) and the Secondary Permission Set (SPS) for e.g. to support software updates in a secure and easy way.

TCFLASH Primary Permission Key Marker (TCSDRn_PFPKM0~3) / TCFLASH Secondary Permission Key Marker (TCSDRn_SFPKM0~3) can be used to switch between the 2 permissions sets. If e.g. the permission key marker [0:126] match with SCCFG_TCFPUSRKEY [0:126] the permission set can be changed by SCCFG_TCFPUSRKEY [bit 127] during the application software execution.

If Flash permission set is disabled in SDR configuration (i.e. SCCFG_STAT0:IFPEN = '0' for TCFLASH and SCCFG_STAT0:DFPEN = '0' for EEPROM Flash), then Flash full (read, write, and execute) access is granted and Flash permission key comparison is also disabled.

Software can check the SCCFG_STAT0:IFPEN bit to know whether TCFLASH permission set is enabled or not

MSDR area: 0x017F0000 to 0x017F007F

TCSDR0 area: 0x017F0080 to 0x017F01BF

Note, permission and security configuration in SDR can be set to default by erasing the related Flash macro in parallel Flash programming mode.

Find more details in the Hardware Manual for FCR4 cluster series in chapter 5 (Security checker), chapter 9 (Tightly coupled flash) and chapter 14a (Boot Rom software interface)

Cheers
Praveen
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