We need to design the AR-HUD backlight application.
Could you provide the minimum output dimming duty in digital PWM?
Minimum Frequency range?
I'm looking to power and control the dimming for an AMOLED display, and was looking for help in how to connect the power and dimming of the amoled. To my understanding, AMOLED displays don't have a backlight, so it's not possible to change the brightness of the actual display. Instead, you can change the voltage/current or the duty cycle of the power to the display to change the brightness.
I'm planning on using an STM32 processor and getting power from USB-C connected to a computer or laptop. I believe that I need a display bias PMIC as a power supply for the display, but I'm not sure how/what dimming solution fits into the circuit.
There's two different types of dimming for OLED: DC dimming and PWM, and I would prefer to use DC dimming, but if it's not possible PWM is fine as well.
For PWM, do I simply connect the output of the display bias to a transistor and change the duty cycle to change the brightness of the display?
If there was any recommendations for chips to use and their circuit configurations that would be greatly appreciated.
I'm writing code for communicating with a TLD7002 for a development tool, and would like to ask a few questions concerning the calculation of the CRC sums. As the driver library is not yet available to me, I'm implementing basic access to the HSLI in the programming language I'm using.
The datasheet of the TLD7002-16ES specifies two types of CRC algorithms, a 3-bit CRC, and an 8-bit CRC.
1. Regarding the 3-bit CRC, in the software design training video there appears a step where the crc value is reflected (mirrored) after processing the first 5 bits:
/* get reflected CRC3 value */ crc = TLD7002_MIRROR_MID_CRC3[crc];
I cannot find this step in the datasheet on page 67, though — an extra step reflecting the crc value after the first 5 bits and the tail 8 bits is not mentioned there; is the datasheet correct regarding the calculation of the 3-bit CRC?
2. The CRC-8 is defined as using the generator polynomial "0x8e = x^8 +x^4 +x^3 +x^2 +1" from CRC-8-AUTOSAR and SAE J1850.
But, from my understanding, 0x8E — binary: (1)-1000-1110 — actually is not the same as x⁸ + x⁴ + x³ + x² + 1;
0x8E is the reversed — LSB-first — form of 0x71 (1)-0111-0001, which corresponds to the polynomial x⁸ + x⁶ + x⁵ + x⁴ + 1, and is a reciprocal form of the CRC-8-SAE polynomial 0x1D, but with similar properties:
So if the polynomial actually is 0x8E, then for calculating the CRC-8 of the safety byte the reversed, LSB first, algorithm would have to be used. Is this correct?
If yes, then it possibly also applies to the CRC-3, because two CRC sums used in the same HSLI frame are likely implemented in the same fashion. This could mean that the polynomial to be used when calculating the CRC-3 would be 0x6 ("reversed"), or 0x5 ("reversed reciprocal"), but not 0x3. Which one is actually used by the TLD7002-16ES?
The CRC-8 of SAEJ1850, by the way, also defines a final XOR step, where 0xFF is XOR'ed into the crc value. I suppose, since the datasheet of the TLD7002-16ES does not mention this, this final step of the original SAEJ1850 definition does not need to be performed in case of HSLI?
It could probably be helpful, if a table of example CRC results for various input values would be included in the datasheet, similarly as it is done in the Autosar document; this way users could perform a test for plausibility of their crc implementations, before sending actual requests to the TLD7002.
At 9V, the PWM driver will see the LED flicker that can be recognized by human eyes. When testing the waveform with the oscilloscope, it is found that the power supply voltage is forcibly pulled down by a few tenths of a volt. When the voltage is adjusted to 10V or above, the flicker disappears, but the phenomenon of forcibly pulling down the power supply detected by the oscilloscope still exists.
This phenomenon is especially obvious when multiple devices supply power at the same time. The waveform of tail point is as follows. Please help analyze whether this phenomenon is normal and what causes it.
PWM may be applied in two different ways in an application.
PWM via PWMI-pin
When PWM is applied via PWM-pin of the first IC only, this will not be propagated to the second and subsequent ICs. Reason is that the IN_SET current is not affected by the PWMI-pin status and will remain stable during the deactivation phase of the PWM. Therefore, the second IC channels will be constantly active while the first IC channel will operate in PWM.
In this case, we have to apply the same PWM to the PWMI-pin of all the ICs in the application.
PWM via IN_SET-pin
When PWM is applied via IN_SET pin of the first IC only, this will be propagated to the second and subsequent ICs. IN_SET current will change according to the PWM and those changes will be mirrored to the OUT_SET pin and therefore will be propagated to the second IC.
IN_SET to OUT_SET activation and deactivation delay times have to be considered for a synchronized result (P_6.6.10, P_6.6.11).
SEPIC using coupled inductors shows
- higher efficiency due to reduced magnetic core losses
- reduces PCB area because it needs the space for only one magnetic component
- simpler compensation due to simple transfer function
On the other hand SEPIC using uncoupled inductors can benefit of components coming from a wider inductance selection thus proving flexibility in the system design.
To see how to use LITIX Power DC-DC controller in SEPIC topology, please have a look at the LITIX Power webpage Show Less
This can be done by using filters with different time constant at the SET pin. The SET pin is the analog adjustment input and it is used to control the output current. One of the filters needs to be switchable.
In the example below
Filter 1 is a low pass filter that enables and disables the output current with a defined delay by closing or opening the MOSFET
Filter 2 is a low pass filter that enables the fade-in/fade-out function.
For further details you can also visit LITIX Power webpage Show Less
This happens because ERRN status depends only on the OUTx and EN/DEN voltages. It doesn't depend on any change of resistive load at IN_SET.
When a fault (OL/SC) occurs the IN_SET regulation turns off: VIN_SET goes to GND after tfault and D charge phase.
For more information on the LITIX™ Basic+ diagnostics check the product datasheet and the application note "Litix™ Basic+ LED driver family: Diagnosis and fault management" Show Less