Device: ICL5102HV（PFC回路で使用）

Question:
1. IEC61000-3-2 Class-Cへ準拠可能ですか？
2. 最大電力は300Wで使用可能ですか？
3. 出力25W以上(最大は300W)で、IEC61000-3-2 Class-Cへの準拠は可能ですか？

Condition:
- AC100-240(±10%)

Two Questions for the Litix TLD5045EJ that I could not find in the datasheet:

a) how do I select the inductor value (the 220uH mentioned in some sections seems quite high especially for the higher frequencies)

b) what is the min dropout voltage, or the max LED voltage at say 12V input and 700mA LED current?

Thanks

KPN

@Kumarkanahai@AliAsgar

Please also help to confirm whether it is normal for the power supply voltage to be forcibly pulled down, and what is the reason for the flicker?

At 9V, the PWM driver will see the LED flicker that can be recognized by human eyes. When testing the waveform with the oscilloscope, it is found that the power supply voltage is forcibly pulled down by a few tenths of a volt. When the voltage is adjusted to 10V or above, the flicker disappears, but the phenomenon of forcibly pulling down the power supply detected by the oscilloscope still exists.

This phenomenon is especially obvious when multiple devices supply power at the same time. The waveform of tail point is as follows. Please help analyze whether this phenomenon is normal and what causes it.

The following attempts and changes have been made

1. The current limit of power supply is adjusted from 5A to 10A without improvement;

2. Cancel D2 (equivalent to removing the diode 0.7V voltage drop), 9V will not flicker with the naked eye, but the waveform still exists. The capacitance of vs pin is connected in parallel with a 1uF capacitor on the basis of 0.1uF, the phenomenon is not improved, and the power supply voltage is also pulled down;

3. Test the voltage drop of LED. The voltage drop of each LED is 2.2V, and the total voltage drop of LED is about 6.6v

It is equivalent to that after D2 is removed and replaced with 0 Ω resistor, the power supply voltage will still be forcibly pulled down, as shown in the following waveform.Please also help to confirm whether it is normal for the power supply voltage to be forcibly pulled down, and what is the reason for the flicker?

We are developing a LED driver based on Infineon IC ICL5102. We are facing a problem with the burst Mode (BM) operation of the IC. 

We want to introduce a BM feature at reduced load condition when we dim the output current by using 1-10V analog Dimming signal. What we have found is that at dimming ( at say 3V dim signal), the unit starts flickering, and the unit operation becomes unstable if we try to use BM operation.

We want to understand how to introduce dimming at lower output current setting, and Is the BM possible under low load condition or not.

Dears:

  When  I installed DC-DC Designer,Design tool for DC-DC control ICs, an error is always showing when start running the software,and same  for other computers,would you please help and advise? Thank you.

使用DCDC设计器，模拟出一个丑陋的拓扑架构，有疑问请教一下：

1、如何来不同的处理器，不同的功率确定负载情况下的开关频率？

2、频率目标，设计器给与的参考值是100HZ，请不同定位，这个不一样？范围值是多少。

3、相位裕度目标参考是45，从参数角度，不是45-60都是合理的参数？或者其他范围。

4、GAIN N,A,db，是否影响不变，仿真BO，该值是确切的OST分数，

5、应用手册中RC取值，3300kΩ不是应该是3300Ω，用3300k带入DCDC设计器，BODE响应是错误的。

6、是否可以获取处理器结构的性能，或者说输入电流的大小。如何提升处理器的性能？

7、输入端感应的流程如何读取？

8、汽车LED应用会遇到电压电池不同的情况，如何选择输入，来确保在不同输入电压情况下，处理器架构的稳定性。

期待您的回复。谢谢

亲爱的，如何获取TLD6098-2相关的拓扑结构sepic参数计算的excel，特别是BODE反馈网络计算