The other C++ library available besides Cyapi.lib for Visual C++ 2008 are for Borland C++ 5, Borland C++ 6, Visual C++ 6 and 7 .The libraries are attached here.

Disclaimer: Please note that this is not an official release and Cypress no longer supports these libraries.For the latest C++ library refer SuiteUSB 3.4

Yes. Please see the application note "EZ-USB FX2LP GPIF Design Guide". It contains code examples on how to make the GPIF trigger single writes and reads in asynchronous mode. 

You can write your data to EP(2,4,6,8) Fifos by the firmware. Then you can trigger GPIF for that EP fifo and transfer data over GPIF.

Emulation is not supported when using an external clock source for the enCoRe II's CPU clock. Designs which need external clock inputs are advised to use the internal clock for emulation, then switch to the external clock for final testing.

Please read the User's Guide that comes with the kit. Pay special attention to the switches S1 and S3. After downloading the .rom file onto the board, do not forget to hit the red reset button on the board.

Community Translation: EZ-USB® AT2LP™ 部品に必要な水晶振動子 - KBA88223

Version: **

Question:

What are the crystal requirements for EZ-USB® AT2LP™ parts?

Answer:

The crystal requirements for EZ-USB AT2LP parts CY7C68300B/CY7C68301B/CY7C68320/CY7C68321 are as follows:

•   Frequency: 24 MHz
•   Operating Mode: Fundamental mode
•   Frequency Stability: 100 ppm
•   Series Resistance: 60 ohms
•   Load Capacitance: 12 pF
•   Drive Level: 500 µW

•   External load capacitance should be 12 pF.

The checksum of a blank CY7C63413-PC device is C020.

The examples provided with the development kit are linked to external memory. To run the examples on your target board you will need to recompile the examples after linking them to internal memory using the Keil tools.We recommend placing code at 0x80 and xdata at 0x1000.

The CY4601 reference design is a single code base that supports both the CY7C63743 and the CY7C64013 parts. The firmware for these parts will only support upto 57.6K baud. This is a limitation of the firmware and not the Virtual COM port driver. The Virtual COM port driver itself supports 115.2K baud.

Included in the reference design is some untested sample code for our EZ-USB AN2131 part. It is possible to support 115.2K baud using this part with an external crystal. This design will require further development and testing on the customers part. It is only supplied as sample code which has not been fully tested or finished. It is not officially part of the reference.

The maximum value Drive Strength is set by default to 01 (Medium Low) for a 3.3V and 10 for 2.5V (Medium High). This crosses into a minimum 15 mA and a maximum of 23 mA. These should correspond to the ranges obtained by the High and Low drive strength settings.

NX2LP does not support MLC Flash Devices. The NX2LP has 1-bit ECC correction per 256-byte, which will not be able to handle MLC NAND. The MLC NAND requires 4-bit ECC correction.

After installing the development tools. The JEDEC files can be found at the location Cypress\USB\Hardware\EZ-USBSeries2100\PALEquations.

There is no direct replacement available for CY7C63613-SC. The function replacement is EncoreII devices. More information can be found on this link.

The latest version of the framework has a compile option for supporting Remote Wake up. Please go through the example.

One easy way is to load it into the Hi-Lo buffer. There's a "Buffer Checksum" feature on the Cystart Hi-Lo software.

USBSTOR.sys supports the ISD-200 and this driver comes along with the Windows XP OS. 

The CY3671 EZ-USB FX development board will work with Windows 98SE, Windows ME, Windows 2000 and Windows XP.  Booting up under Windows ME and re-installing the development kit CD should solve this problem.

The CY64x13 hardware automatically generates SE0s. This feature was implemented specifically as a means of preventing babble in hub applications. For the most part, this behavior has been successfully implemented with no ill effects. However, in some host environments and in non-hub applications this might cause some problems. The register located at F2h is an undocumented register. Writing a 10h to register F2h disables the generation of SE0s.

At 3.3V, the recommended frequency maximum is 12MHz.

CPU needs a minimum of 4.75V Vdd in order to work properly at 24Mhz.

There is only one GPIF Tool and it can be used to generate the GPIF microcode for both EZ-USB FX2 and EZ-USB FX. Make sure that you select the correct target processor when starting a new project. This is how the GPIF Tool instantiates the appropriate gpif.c file.

The older GPIF Tool has been replaced with a new tool called the GPIF Designer. The new tool allows waveform design using a graphical interface. The GPIF Designer also supports both the FX and FX2 devices.