For spec numbers 001-00001 to 001-99999, the KBA number is five digits; for spec numbers 002-xxxxx, add '2' to make it a 6-digit number. For example, for spec 002-12345, the KBA number is 002-212345 to distinguish it from KBA12345 for spec 001-12345.
How to terminate the unused power pins for CY27410 or CY27430 ?
We will use the pin out for CY27410 to understand better.
Power supply pins like VDDIO-D2 or VDDIO-S2 can be left open/floating, if they are unused in the application.
Question: Where can I find the RF regulatory certification-related details for CYBLE-343072-02, CYBLE-333073-02, CYBLE-333074-02, CYBLE-343176-02 AIROC™ Bluetooth® LE modules?
Answer: CYBLE-343072-02, CYBLE-333073-02, CYBLE-333074-02, CYBLE-343176-02 AIROC™ Bluetooth® LE modules are fully certified for FCC, ISED, CE, UKCA and MIC/TELEC. The certificates and test reports are attached with this article. The following table lists the compliance of the module to regulations across various regions.
|North America||USA, FCC Part 15.247 and Canada, ISED (RSS-247 Issue 1)|
|Europe||ETSI (EN 300 328), EN 62368-1, EN 301 489-1/17, EN 62479|
|Australia||AS/NZS 4268, Radio Communications (Electromagnetic Radiation – Human Exposure) Standard 2003 Australia + A1|
|Japan||MIC, Article 2 paragraph 1 item (19)|
|UK||Equipment Regulations 2017 (S.I. 2017/1206)
Electromagnetic Compatibility Regulations 2016
The following table lists the certification IDs of different regulations
* CYBLE-343072-02, CYBLE-333073-02, CYBLE-333074-02, CYBLE-343176-02 have the same Certification ID
1 The test reports of FCC and ISED are the same.
2 The test reports of CE include AS standards. The test reports of CE and UKCA are the same
In the code, you can read the major version, minor version, patch number, and build number of the Bluetooth® LE stack library by using the API as follows:
For PSoC™ 4 CY8C4x47xx-BLxxxx MCU with AIROC™ Bluetooth® LE:
The CyBle_GetStackLibraryVersion()API function is used for reading the major version, minor version, patch number, and build number of the Bluetooth® LE stack library. See the following sample code segment:
apiResult = CyBle_GetStackLibraryVersion(&stackVersion);
printf("BLE Stack Version: %d.%d.%d.%d\r\n", stackVersion.majorVersion,
For PSoC™ 6 CY8C63x7 MCU with AIROC™ Bluetooth® LE:
The Cy_BLE_GetStackLibraryVersion()API function is used for reading the major version, minor version, patch number, and build number of the Bluetooth® LE stack library. See the following sample code segment:
apiResult = Cy_BLE_GetStackLibraryVersion(&stackVersion);
printf("BLE Stack Version: %d.%d.%d.%d\r\n", stackVersion.majorVersion,
Question: Is it possible to stream video from two image sensors using one EZ-USB™ FX3?
Yes. You can use a FX3+FPGA solution. A slave FIFO interface can be used to communicate with the FPGA
(refer to AN65974 - Designing with the EZ-USB FX3 Slave FIFO Interface for more details on slave FIFO interface). Streaming from two image sensors using one FX3 can be done by creating two DMA channels.
For example, if two DMA channels created are as follows:
DMA channel - 1 with Producer sockets as CY_U3P_PIB_SOCKET_0, CY_U3P_PIB_SOCKET_1 and Consumer socket as CY_U3P_UIB_SOCKET_CONS_1
DMA channel - 2 with Producer sockets as CY_U3P_PIB_SOCKET_2, CY_U3P_PIB_SOCKET_3 and Consumer socket as CY_U3P_UIB_SOCKET_CONS_2
The FPGA can maintain two FIFOs to store data from the two image sensors. The FPGA code should change the address lines (A0 & A1) depending upon the FIFO from which it fetches the data from and send to FX3.
The sensor1 data should be stored in FIFO 1 of the FPGA and sensor2 data should be stored in FIFO 2 of the FPGA.
During the blanking period, FPGA can switch the FIFO and change the address lines to select the appropriate DMA channel of FX3 for streaming the data; that is, if the data is coming from FIFO 1, the 2-bit address line A0:A1 should be driven with 00 or 01 alternatively i.e. in ping-pong manner to select CY_U3P_PIB_SOCKET_0 or CY_U3P_PIB_SOCKET_1 of DMA channel 1.
Similarly, if the data is coming from FIFO 2, then the FPGA should drive the 2-bit address lines A0:A1 as 10 or 11 alternatively to select CY_U3P_PIB_SOCKET_2 or CY_U3P_PIB_SOCKET_3 of DMA channel 2.
Note: Refer to sections 3 and 4 of the AN75779 - How to implement an image sensor interface using EZ-USB FX3 in a USB video class (UVC) framework to understand ping-pong DMA buffer.
The video data received by the PIB sockets corresponding to the DMA channel as mentioned in the above example, will be transferred to USB block through DMA channel. As two video streams from two sensors will be streamed using two DMA channels, the device should enumerate as a composite device with two UVC interfaces i.e. FX3-UVC-1 and FX3-UVC-2. In the host application like AmCap, VLC media player, user will get option to choose a UVC interface to start streaming video. If streaming from both the sensors is to be started simultaneously, two instances of host application should be opened and appropriate UVC interface should be selected.
Figure 1. Composite device with two UVC interface
For the device to enumerate with two UVC interfaces, the USB descriptors should be modified to support two sets of UVC descriptors. In addition to this, the firmware should also handle UVC specific requests for both the interfaces.
A template firmware with two UVC interfaces and UVC specific request handling is attached with this KBA. The header file for GPIF state machine (cyfxgpif2config.h) used with the firmware is a dummy state machine. The user is expected to use a custom GPIF state machine header file based on the application. Two CY_U3P_DMA_TYPE_MANUAL_MANY_TO_ONE DMA channels are used in the firmware to stream two 640* 480 (VGA) YUY2 at 30 FPS video streams. As per the default AN75779 UVC firmware, the UVC header is added in the firmware. The cyu3imagesensor.c and cyu3imgagesensor.h are also created and saved in this project. The cyu3imagesensor.c file is used to configure and control the image sensor and FPGA. In this file, some structures are defined without a valid value. You need to replace these values with actual settings. Generally, used APIs such as CyFx3_ImageSensor_Sleep, CyFx3_ImageSensor_Wakeup, and CyFx3_ImageSensor_Trigger_Autofocus are also available the cyu3imagesensor.c and cyu3imagesensor.h files. Add the corresponding codes into these definitions.
Note: The firmware attached with the KBA is a template project and should be modified according to user application.
Question: Why do keyboard commands not work in modus-shell?
Answer: The modus-shell tool included with ModusToolbox™ software is based on the latest version Cygwin. The latest version of Cygwin does not support some keyboard shortcuts, such as Ctrl + V (paste) and Ctrl + F (find).
Workaround: Use the context menu from the Title bar and select various commands shown under Edit.
A reference design kit based on Infineon’s EZ-USB™ CX3 USB 3.0 camera controller and EN801/EN805 image signal processor (ISP) from the Eyenix website. This camera kit uses an IMX307 image sensor from Sony with a manual focus lens.
Figure 1. Kit block diagram
Eyenix ISP has a 4-lane MIPI-CSI2 RX interface for connecting image sensors and a 4-lane MIPI CSI-2 TX interface for connecting to EZ-USB™ CX3.
Infineon EZ-USB™ CX3 enables USB 3.0 connectivity to EN801/EN805 using a MIPI-CSI2 interface with data speed up to 1 Gbps per lane.
Figure 2. Kit photo
Key features of the kit:
Eyenix EN801/EN805 ISP has the following features:
The kit also supports control through an on-screen display (OSD) menu. This menu can be navigated using the Python-based camera control tool as shown in Figure 3. The tool controls the ISP menu via USB CDC class through a PC.
Figure 3. Menu control tool
Figure 4. On-screen display (OSD) menu
See the Eyenix website for more information on this camera control software and applications including surveillance cameras, webcams, document scanners, and machine vision systems.
Why does my legacy BTSDK project (version 2.7.1 or older) fail to build in ModusToolbox™ 2.4?
There have been changes with the build system in more recent versions of the software that affect older projects. You may see errors like the following:
COMPONENT_fw_upgrade_lib/ota_fw_upgrade_common.c: In function 'wiced_ota_fw_upgrade_init':
<command-line>: error: 'DLConfigSSLocation' undeclared (first use in this function)
COMPONENT_fw_upgrade_lib/ota_fw_upgrade_common.c:204:26: note: in expansion of macro 'SS_LOCATION'
204 | nv_loc_len.ss_loc = SS_LOCATION;
<command-line>: note: each undeclared identifier is reported only once for each function it appears in
That is the location of the active BSP.
# split up btp file into "x=y" text
The legacy project should build successfully in the ModusToolbox™ 2.4 environment.
Infineon recommends that you isolate the sensor from vibration sources. The operating frequency of the sensor is 40 Hz. If vibration is expected at exactly 40 Hz with very high acceleration (≤ 0.3 g), you should do the following to minimize the vibration impact:
However, for a typical application, the impact of vibration is minimal. As shown in Figure 2, for a test setup with three sensors mounted on a commercially available air purifier, the test result shows that with the denoiser filter enabled, the sensor is robust against the vibration generated by a different fan of the air purifier.
Figure 2. Vibration robustness of XENSIVTM PAS CO2
For more details, visit the CO2 sensor website and see the application note, General design in guidelines for XENSIV™ PAS CO2 sensor.
Figure 3. Impact of CO2 on the human body at various concentration levels
One such setup is as follows:
Evaluation kits are already available with major distributors.
Figure 4. Average power consumption
For more information, see Section 3 of the application note, XENSIV™ PAS CO2 for low-power applications.
With the automatic baseline offset correction (ABOC) feature enabled, the sensor accuracy drifts by 1% every year.
Figure 5. Values of pressure and acoustic stability
See Section 4.1.5 - Transfer function table in the datasheet.
Each sensor is calibrated during our production for the complete operating range. Production calibration is done with highly accurate CO2 gas bottle and verified with an ideal reference sensor.
The sensor might show small amount of offset after assembly due to stress generated from the assembly process on the light source. Therefore, to get the best performance, this offset should be corrected using either FCS or ABOC.
For the FCS calibration, you need to have a reference sensor. In the ABOC mechanism, the device keeps track of the minimum value recorded over a week. The offset to the reference baseline is computed and used to calculate the correction factor to be applied for the week after.
Figure 6. Operation of the ABOC feature
See the application note, After-assembly calibration scheme for XENSIV™ PAS CO2 for more details.
Figure 7. Airflow direction
See the application note, General design in guidelines for XENSIV™ PAS CO2 sensor for details.
Note: For more information, see the Community webpage for CO2 sensor where you can find answers to your questions and ask your own.
VLKO is the lock-out voltage of the core power supply (VCC). The intention of VLKO is to make sure that device is on expected VCC level before program/erase to avoid unintentional program/erase operation during VCC power-up and down transitions. When VCC is below VLKO, the entire flash memory array is protected against a program or erase operation. This ensures that no spurious alteration of the memory content can occur during power transition.
VLKO is a single-value threshold parameter; every device has a different VLKO. Min/Max is an estimated range of VLKO. All the devices have VLKO within this range.
During power-down or when VCC drops below VLKO, the VCC and VIO voltages must drop below the VCC Reset (VRST) minimum for a period of tPD for the part to initialize correctly when VCC and VIO again rise to their operating ranges. See Figure 1.
In system implementation, you should use the maximum value for VLKO in all devices. For example, monitor VCC; if it drops below VLKO(max), make sure that VCC and VIO voltages drop below the VCC Reset (VRST) minimum for a period of tPD so that the device is correctly initialized.
Figure 1 Power down and voltage drop
Figure 1 shows the power down and voltage drop diagram and VLKO. See Figure 10 in S29GL01G/512T datasheet Rev.L.
This diagram applies to all Infineon GL series Parallel NOR flash families.
Wait states and dummy cycles are the same. Read latency is superset of wait states (or dummy cycles). Read latency equals the sum of clocks for mode bits and wait states.
To understand the concepts, here are the definitions from JESD216 standard:
Figure 1 Read latency without mode bits
Figure 2 Read latency with mode bits