A double fault feature is implemented in TLD1315EL, which prevents incorrect open load (OL) fault detection during supply voltage drops.
In an application where all three TLD1315EL output channels are externally merged together to drive the same LED load, the double fault feature acts, avoiding the OL fault detection via ST pin. Therefore, the OL detection fails.
This feature cannot be deactivated so it is not recommended to use TLD1315EL with its output channels merged together.
See https://www.infineon.com/cms/en/product/power/lighting-ics/litix-automotive-led-driver-ic/litix-basic/tld1315el/ here for the datasheet and application note.

A series resistance can limit the current on pin IS, as the internal circuit comes to saturation earlier. However, V_ADC should not be considered when calculating RGES (Rseries+R20).
Rather, the calculation should look like this: RGES= (VS– Vsat)/ 6mA RGES= (24V – 2V)/ 6mA = 3666Ω
V_ADC then needs to be considered for the voltage divider: (VS-Vsat)/ RGES= VADC/ R20
https://www.infineon.com/dgdl/Infineon-Application%2BNote-PROFET%2B12V-What%2Bthe%2Bdesigner%2Bshould%2Bknow-AN-v01_00-EN.pdf?fileId=5546d46259b0420a0159d5c957260d9c The Application Note, chapter 4.3, provides a better method to calculate the losses in the sense resistor.

For CCP1 and CCP2, it is recommended not to exceed 330 nF.
The internal charge pump circuit has a certain current capability, and might not be able to fully charge CCP1 and CCP2 during a charge pump cycle, if the capacitance values of CCP1 and CCP2 are too high. 
For CCP, 1 µF is possible. If the capacitance value is bigger, it takes more time for the internal charge pump circuit to overcome the CP undervoltage.
Generally, 470 nF is possible.
- CCP1 is an external capacitor connected between CPC1N and CPC1P.
- CCP2 is an external capacitor connected between CPC2N and CPC2P.
- CCP is an external capacitor connected between VS and CP.

A drop of the battery voltage while the module is in Sleep Mode leads to a higher device current consumption.
The scenario can be the following:
1. The microcontroller sends the TLE9185xx to Sleep Mode, and goes into Sleep Mode itself.
2. VS/VSINT drops below the monitoring threshold voltage V_POR,f and rises above the voltage V_POR,r. The TLE9185xx wakes up autonomously.
3. Since the watchdog cannot be served, the microcontroller is still in Sleep Mode, after 4 consecutive watchdog failures, the TLE9185xx goes into Fail Safe Mode with higher device current consumption than expected in Sleep Mode without the microcontroller's knowledge.

If target output current is 240mA, then according to datasheet (output current accuracy configuration), CFG=GND, OUTL=Open, OUTH=connected to Load are recommended. Is this configuration still valid in Power shift circuit without MOSFET?
The same recommendations hold for the configuration without external MOSFET:
- OUTL is used: keep CFG pin open
- OUTH is used: connect CFG pin to ground
Additionally the PWR_SHG pin, usually controlling the gate of the external power shift transistor, can be left open.

VSINT is the supply for the voltage regulator VCC1.
VS is the supply for the charge pump and for the gate drivers.
Having two separate inputs for VS and VSINT enables buffering VSINT more easily, in order to maintain VCC1 in case of a voltage drop of the battery.
Indeed, the possible high load current drawn by the half-bridges does not discharge Cin2, which is the buffer capacitor for VSINT, thanks to the decoupling diode Drev1.
Note: Drev1 is also used as reverse battery protection for VSINT. https://www.infineon.com/export/sites/default/en/about-infineon/company/contacts/support/images/TLE956x_VS_VSINT.png Image

A series resistor at the gate of the MOSFETs is not required for the slew rate control, because the gate drivers consist of current sources and current sinks. A series resistor at the gate of 4.7 to 10 Ohm could be used to damp eventual oscillations (dependent on the length of the traces between the gate driver and the MOSFET gate, layout, etc.). It is recommended to place a zero Ohm series resistor for the first prototype and verify that no oscillations of the gate-source voltage are visible.
Once verified, the series resistor to the gate can be removed to optimize the bill of material and reduce the PCB size.

The X is Halogen free, RoHS compliant, and Totally Lead free. The U is TAPE & REEL DRY. The M is (330mm) and functional packing per box. The A2 denotes the designator increments (e.g. from A1 to A2) whenever a new SP number is set up that does not differ from a previous product in either Salesname or the first three OPN suffix identifiers. Product variants such as different temperature ranges or ROM codes can therefore be recognized by the designator.
The full translation table can be found https://www.infineon.com/cms/en/product/search/opn/orderable-part-number-opn-translation-table/ here.

In TLE987x Channels 0 - 5 can be fully programmed. Several Sequence registers, especially for channels 6-9, are protected to ensure a fast update of measurement results used for internal diagnosis. Hence the channels 6 and 7 are prioritized and are measured more often. The high prioritization is given by an enabled measurement for each sequence. They cannot be switched off. All other channels are not enabled in far fewer sequences. Thus, for enabled channels (not 6,7) the update rate (periodicity) is lower, but defined by the channels 6 and 7. Hence, overall periodicity is mainly determined by these two channels.

The main difference between the two devices is in the input types:
a) TLE7181EM uses the PWM/DIR interface and DRVDIS to disable all 4 MOSFETs: only two pins are needed and shoot-through event cannot happen by design.
https://www.infineon.com/cms/en/about-infineon/company/contacts/support/images/PWM_DIR_interface_nornal_operation.png PWM/DIR interface nornal operation
b) on the other hand, TLE7182EM provides 4 independent control inputs to control the MOSFETs individually: the high-side MOSFET inputs are inverted to eventually simplify the connection wiring. Shoot-through events can be avoided if the short-circuit protection is activated by generating a minimum dead time by SCDL pin. TLE7182 offers the possibility to drive 4 low-side MOSFETs as well.
https://www.infineon.com/cms/en/about-infineon/company/contacts/support/images/truth_table.png Truth table
LITIX™ Basic and Basic+ devices are reverse polarity protected:
* LITIX™ Basic down to -16V
* LITIX™ Basic+ down to -18V
This means that if there is a *static pulse* higher than -18V and no external reverse polarity diode, the device could be destroyed.
For *transient* pulses a TVS diode, reverse polarity diode and ceramic capacitor are recommended, unless the surge pulses are filtered using system-level measures.
See the corresponding datasheets https://www.infineon.com/cms/en/product/power/lighting-ics/litix-automotive-led-driver-ic/litix-basic-plus/ here.