MPWR SRAMs: tSCE
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Sep 01, 2011
09:49 AM
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Sep 01, 2011
09:49 AM
In MPWR SRAMs, when device wakes up from standby, is the time to write solely determined by tSCE?
Yes. The minimum /WE pulse required to write the data into a memory cell is called the write pulse width (tPWE). This parameter is determined by how fast the write enabling circuit connects the data input drivers to the internal bus to write into the memory. This parameter is also governed by how fast the write operation is stopped. There are four possibilities for the operation:
1. start write with /WE, end with /WE
2. start write with /CE, end with /CE (TSCE)
3. start write with /WE, end with /CE
4. start write with /CE, end with /WE (TSCE)
So, when the device is coming out of standby (write initiated by /CE i.e. case 2 & 4), tSCE is the parameter that governs the time to write.
Translation - Japanese: tSCEの明確化 - Community Translated (JA)
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