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Why series resistors on logic pins are recommended for SPOC™ +2?

Why series resistors on logic pins are recommended for SPOC™ +2?

Infineon_Team
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SPOC™ +2 Application Diagrams recommend a few external components to ensure the intended device behavior under extreme environmental conditions.

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Figure 1 Application Diagram

This KBA focuses on the series resistors which interfaces the SPOC™ +2 device with a microcontroller.

There are a few application conditions, which require these series resistors, to either protect the SPOC™ device and / or microcontroller to ensure the intended device behavior.

Such application conditions might be:

  • Positive voltage transients on the battery line
  • Negative voltage transients on the battery line
  • Reverse battery condition
  • Loss of device GND condition

In general, to understand the main current paths existing in the devices, it is important to understand the internal structures of a SPOC™ +2 device. As representative a four channel SPOC™ +2 device is used.

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 Figure 2 Simplified internal devices structure

There is an ESD protection on every logic pin which is (for simplicity) represented as a diode to GND. Same applies for the logic supply VDD and the GPIOs and ADC inputs of the microcontroller.

Depending on the application condition, the current through these diodes is flowing either in forward or reverse direction.

Positive voltage transients on the battery line

In case of a transient overvoltage on the battery line which is exceeding the clamping voltage on VS (e.g. VS(CLAMP)_25), the clamping structures from VS to GND, VS to IS and VS to OUT become conductive.

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Figure 3 Current paths with positive voltage transient on the battery line

The mentioned cases above require an appropriate RGND, RSENSE and RL to limit the current.

The current through RGND is causing a shift of the GND. As soon the GND is shifted up by one diode forward voltage above the clamping voltage of the GPIO of the microcontroller, a part of the current is flowing through the microcontroller to GND in case the GPIO is driving a low-level signal. If the GPIO is high Z, the GND shift needs to reach the clamping voltage of the GPIO plus one diode forward voltage. To protect the SPOC™ and the microcontroller, this current has to be limited by series resistors between the logic pins of the SPOC™ and the microcontroller.

These resistors could be for example RSPI (RSCLK, RCSN, RSI, RSO) and RLHI as shown in Figure 3. A typical value for a SPOC™ device would be 1.2 k for SPI signals and 4.7 kΩ for the LHI signal. These are recommended values and have to be checked with the maximum ratings of the microcontroller and verified in the real application.

The current through RSENSE is causing the voltage on sense pin to rise. To limit the voltage and the current injection at ADC pin, two series resistors and a Zener diode to GND are recommended. Depending on the maximum rating of the microcontroller, one series resistor could be sufficient. A typical value for the total series resistance would be in the range of 10 kΩ. A Zener diode, when needed, has to be selected in accordance to the ADC reference voltage of the microcontroller.

The current through the output is taking big part of the energy of the overvoltage transient. Typically, during product characterization a resistor which is representing the nominal load is connected. In case an electronic load is connected, it might happen, that the load is taking less energy during this kind of pulses, which means, that the other current paths have to equalize, which might require additional protection elements in the application.

Negative voltage transients on the battery line or reverse battery condition

With negative voltage transients on the battery line the current paths stay the same, but the direction of the current is changed.

The main difference between negative voltage transients and a reverse battery condition is the voltage level and the duration of the exposure. Transients are typically short pulses with high amplitudes, whereas reverse battery condition is specified for up to 5 minutes, but with max. 18 V in a 12 V system.

For reverse battery condition the path from device GND to VS is blocked by a diode. All other current paths are conductive, but with lower current when reverse voltage < -8 V.

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Figure 4 Current paths with negative voltage transient on the battery line 

Loss of device GND condition

When device GND connection is lost, the device is intended to safely switch OFF all outputs.

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Figure 5 Current paths with loss of GND condition

When the GND connection is lost, the internal GND is floating up towards VS. In case any logic pin is on GND potential, either hard wired for an unused pin, or in case the GPIO is driving a low-level signal, this pin will act as substitute GND for the supply current of the device. Depending on the sum of the GND currents, the outputs could either stay ON or oscillate. To ensure the safe switch OFF of all outputs, the current through this parasitic GND has to be limited by series resistors. A typical value for pull-down resistors would be 10 k. The typical value for series resistors interfacing the microcontroller would be between 1.2 k and 4.7 kΩ as already mentioned above.

Consideration in terms of electromagnetic interference (EMI)

For any recommended passive component near a SPOC™ device it applies, that the component should be placed as close as possible to the device pin it belongs to.  This also applies for the series resistors discussed in this article.

Calculation example a for reverse battery condition


For an easier understanding of the approach described above, a small calculation example will help to bridge the theory into praxis.

Application information:

Device: BTS71040-4ESP

Reverse Battery Voltage: VREV = 14 V

Load Resistance: RL = 2.3 (parallel resistance of two connected channels)

Task: Calculate the needed RVDD and RSPI to stay within the specified maximum ratings of SPOC™ device.

Needed information from BTS71040-4ESP Data Sheet Rev. 1.00:

Figure 3 Voltage and Current Convention:

Infineon_Team_3-1696836604040.png

Figure 6 Voltage and Current Convention

Parameter

Symbol

Values

Unit

Note or
Test Condition

Number

Min.

Typ.

Max.

Current through VDD Pin

IVDD(REV)

-10

30

mA

t ≤ 2 min

P_4.1.0.10

Current through DI Pin Reverse Battery Condition

IDI(REV)

-1

10

mA

t ≤ 2 min

P_4.1.0.36

Digital Input Clamping Voltage

VDI(CLAMP2)

6.5

7.5

8.5

V

IDI = 2 mA

P_5.4.0.3

Digital Supply Clamping Voltage

VDD(CLAMP2)

6

7

8

V

IDD = 20 mA

P_6.4.1.12

 The typical forward voltage drop of a silicon diode is considered with 600 mV.

When applying this information to Figure 6, and calculating the voltage levels on the different nodes, we get the following results:

Infineon_Team_2-1696836558984.png

 

Figure 7 Calculated voltage levels on external and internal nodes

This means that the series resistors have to ensure a certain voltage drop at the maximum allowed current.

VDROP_SPI = 6.3 V

VDROP_VDD = 6.2 V

Using the Ohm’s law, the minimum needed input resistor can be calculated:

Infineon_Team_1-1696836505966.png

Based on the calculation, for reverse battery condition of -14 V, a resistor of 630 would be sufficient on the SPI pins. For the series resistor on VDD, 206 Ω would be needed.

Anyhow a resistor of 1.2 k on SPI pins and 470 Ω on VDD pin is recommended to cover other application conditions and to protect the GPIO of the microcontroller, which specifies typically lower current values.

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