Why AURIX™ TC233 is going into power-on-reset (POR) after two times watchdog reset? - KBA234414
Community Translation: AURIX TC233™が、2回のウォッチドッグリセット後にパワーオンリセット（POR）に移行するのは何故ですか？- KBA234414
Question: Why AURIX™ TC233 is going into permanent reset after two times watchdog reset?
Each watchdog time out will result in an SMU alarm due to the watchdog timer overflows during the second watchdog reset, again the SMU alarm will be raised and the device will stay in reset and can only be released by a power-on-reset.
The permanent reset after two watchdog timer resets is defined to avoid an always restarted system. Bit WDTSCON1.CLRIRF can be used only to clear the internal flag. There is no way to detect if there was a previous watchdog reset.
See the “RCU” section of the User’s manual for more information on registers.
Note: This KBA applies to the following series of AURIX™ MCUs:
- AURIX™ TC2xx series
- AURIX™ TC3xx series