Traveo II Automotive Body Controller - FAQ – FLASH - KBA232509
6.1. Do Traveo II Body Entry Controllers have cache?
The Traveo II Body Entry Controllers have cache as a part of Flash Controller block, so cache is available for the CodeFlash and WorkFlash memories. SRAM data will not be cached. For more details, see the CM0+ and CM4 CPU Caches section of the Traveo™ II Automotive Body Controller Entry Family Architecture Technical Reference Manual (TRM) (002-19314 Rev. *E). CM0+ and CM4 have individually allocated cache and are controlled by the FLASHC_CM0_CA_CTLx and FLASHC_CM4_CA_CTLx registers, respectively.
6.2. I am unable to access certain FM_CTL_ECT registers. What could be the reason?
As mentioned in the device datasheet, these registers are protected by the PPU pair PERI_MS_PPU_FX_FLASHC_FlashMgmt. This PPU is configured by the boot, and blocks access to the FM_CTL_ECT registers. You do not need most of the registers as they are used during flash operations. To configure the flash interrupt registers (FLASHC_INTR, FLASHC_INTR_SET, FLASHC_INTR_MASK), use the Configure FM Interrupt system call.
6.3. What is the CodeFlash and WorkFlash in Traveo II?
CodeFlash is a flash memory used to store programs. CodeFlash is a part of eCT Flash, which is an embedded flash targeted for use in automotive applications. The top sectors in code flash are assigned as supervisory region and other sectors are assigned as code region. The supervisory area is used to store trim parameters, system configuration parameters, protection and security settings, boot scripts, and other Cypress proprietary information. Read access to this region is permitted, but program/erase access is prohibited. Code region is the memory field to store program code flash.
WorkFlash is a flash memory used to store data. WorkFlash is a part of eCT Flash, which is an embedded flash targeted for use in automotive applications. All sectors in work flash are assigned as work region. Work region is the memory field to store data.
For more details, see the Traveo II Architecture TRM for each series
6.4. What is the eCT Flash in Traveo II?
embedded Charge Trap (eCT) is a patented and proprietary NOR Flash technology developed for high-performance MCUs with stringent reliability requirements. eCT has very attractive features for embedded Flash memory in automotive, industrial, and consumer applications. eCT Flash is based on charge-trap technology that has been proven in volume production in six technology generations of MirrorBit® NOR Flash memory.
eCT technology is used in numerous automotive MCUs, such as Traveo and Traveo II product families. These products serve a broad range of automotive applications including:
- Instrument clusters and head-up displays
- Hybrid and electrical vehicle motor control
- Body control modules and HVAC
For more details about eCT Flash, see Cypress eCT Flash Introduction.
6.5. What is the operation size number of Traveo II CodeFlash and WorkFlash?
- Erase sector size is 32 KB for large sector (LS) and 8 KB for small sector (SS).
- Program data size can be 64 bits, 256 bits, and 4096 bits. You can configure the program size can be through the ‘Program Row’ system call.
- Erase sector size is 2 KB for LS and 128B for SS.
- Program data size is 32 bits, 64 bits, 128 bits, 256 bits, 512 bits, 1024 bits, 2048 bits, and 4096 bits.
6.6. Is Traveo II Flash operation available in low power modes?
The Flash operations (Cy_Flash_ProgramRow(), Cy_Flash_EraseAll(), and Cy_Flash_EraseSector()) are allowed in Sleep modes. But, user firmware should not enter the DeepSleep or the Hibernate mode until Cy_Flash_ProgramRow(), Cy_Flash_EraseAll(), or Cy_Flash_EraseSector() is completed. In addition, during Flash operation, the device should not be reset, including the XRES pin, a software reset, and watchdog reset sources. Also, low voltage detect circuits should be configured to generate an interrupt instead of a reset. Otherwise, portions of flash might undergo unexpected changes.
6.7. What happens if WorkFlash is read immediately after erasing (that is, before its initialization)?
Immediately after the WorkFlash is erased, the contents of the WorkFlash are uncertain. If WorkFlash is (read) accessed before its initialization, ECC error occurs and an exception happens if FLASHC_FLASH_CTL. WORK_ERR_SILENT is 0.
6.8. Can Blank Check command be used for Code Flash?
The SROM API, Blank Check command (0x2A), is applicable on the addressed WorkFlash only. For code flash writing, after flash sector erased and returned success, verify by checking all values in the sector are “1”. If the verification passes, execute the flash writing command. After flash writing is complete, verify the sector by comparing the read back data with the corresponding data to be written into that sector.
6.9. How can I check if the “1-bit” ECC error is due to reading a blank location or if there was an actual ECC error?
You can set a breakpoint in the fault interrupt and once the fault interrupt occurs, you can follow these steps:
- Confirm that the fault ID is "0x34" from the FAULT_STRUCT_STATUS register and that the "VALID" bit is set.
- Identify the fault location from the FAULT_STRUCT_DATA0 register.
DATA0[26:0] contains violating address. Append 5'b00010 as most significant bits to derive 32-bit system address.
- Check if the value of "WORK_ECC_EN" in the FLASHC_FLASH_CTL register is "1".
- If not, set WORK_ECC_EN to "1". Then, follow these steps:
- In the Debugger Memory window, read the value in the address calculated in step 2. This can be considered as value0.
- Read the value in the address calculated in step 2 again. This can be considered as value1.
- Now, set WORK_ECC_EN to "0" in the “FLASHC_FLASH_CTL" register. Read the value in the address calculated step 2. This can be considered as value2.
- Now, set WORK_ECC_EN to "0" in the “FLASHC_FLASH_CTL" register. Read the value in the address calculated in step 2 again. This can be considered as value3.
Check the values value0, value1, value2, and value3.
- If "value0 and value1 are equal" and "value2 and value3 are equal" and "value0 and value2 have only 1-bit difference between them", it would mean that the address was already programmed and not blank and there is an actual 1-bit ECC error.
- If (value0 and value1 are different) or (value2 and value3 are different) or the previous condition fails, the address being read was blank. Reading a blank address in WorkFlash will result in spurious data.