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TCPWM interrupt does not occur in XMC7000 MCU family-KBA234436

TCPWM interrupt does not occur in XMC7000 MCU family-KBA234436

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TCPWM interrupt does not occur in XMC7000 MCU family-KBA234436

Community Translation: XMC7000 MCUファミリでTCPWM割り込みが発生しない-KBA234436

Question

Generating an interrupt to the CPU with the TCPWM Counter Overflow (OV) event. However, when the reload signal is input to the counter, no interrupt occurs. How to generate an interrupt when a reload signal is input to the counter?

LinglingG_46_0-1673852544100.png

 

Answer

When a reload signal is input to the TCPWM counter, overflow of the counter occurs, but no TC event occurs. This is as specified.

To generate an interrupt even when a reload signal is input to the counter, use a compare match to generate an interrupt.

For example, set the compare value to "0" in the "TCPWMx_GRPy_CNTz_CC0" register and enable CC0_MATCH in the “TCPWMx_GRPy_CNTz_INTR” register. When the counter is set to "0" by the reload signal, it matches the compare value. Therefore, a compare match interrupt is generated as shown below. ('x' signifies the TCPWM instance number, 'y' is the group number, and 'z' is the counter in the respective TCPWM group.)

LinglingG_46_1-1673852592291.png

 

Note that the interrupts are counter mode-specific and can be generated for a Terminal Count (TC) or Compare/Capture0/1 (CC0/1) event. See the "Timer, Counter, and PWM" section in the corresponding technical reference manual.

LinglingG_46_2-1673852638501.png

 

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