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TCPWM 16-bit Motor control in TRAVEO™ T2G MCU

TCPWM 16-bit Motor control in TRAVEO™ T2G MCU

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TCPWM 16-bit Motor control in TRAVEO™ T2G MCU

TCPWM 16-bit Motor control has some advanced Motor control features. This KBA explains difference features for the others TCPWM in TRAVEO™ T2G MCU.

TRAVEO™ T2G MCU has TCPWM 16-bit, 16-bit Motor control, and 32-bit.

Features are same for three types of counter but TCPWM 16-bit Motor control has four advanced Motor control features as below.

- In PWM_DT mode, Dead time can be 16 bits
- In PWM_DT mode, LINE_OUT and LINE_COMPL_OUT have different dead time
- In PWM and PWM_DT mode, cc0_match and cc1_match generation can be enabled/disabled individually for up and down counting in UPDN1/2 mode
- In PWM and PWM_PR mode, select function for PWM output signals (LINE_OUT and LINE_COMPL_OUT) to drive '0', '1', PWM, inverted PWM, or 'Z' (high impedance) including buffer register and synchronous update across counters via switch event

Related registers for advance Motor control: (e.g. CYT4BF)

TCPWMx_GRP1_CNTz_DT.DT_LINE_OUT_H, DT_LINE_COMPL_OUT

TCPWMx_GRP1_CNTz_CTRL.CC0/1_MATCH_DOWN_EN, CC0/1_MATCH_UP_EN, AUTO_RELOAD_LINE_SEL

TCPWMx_GRP1_CNTz_LINE_SEL

TCPWMx_GRP1_CNTz_LINE_SEL_BUF

Note: In TCPWMx_GRP1_CNTz, 'x' signifies TCPWM instance number, and 'z' is the counter in the

respective TCPWM group.

For detail of TCPWM, see the Timer, Counter, and PWM of the TRAVEO™ T2G architecture TRM and register TRM.

More information

  • TRAVEO™ T2G Architecture TRM
  • TRAVEO™ T2G Register TRM

Note:

 This KBA applies to the following series of TRAVEO™ T2G MCUs:

  • TRAVEO™ T2G CYT2xx series
  • TRAVEO™ T2G CYT3xx series
  • TRAVEO™ T2G CYT4xx series
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