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Switching a GPIO Pin Connection between Analog and Digital Sources in PSoC® 4 - KBA90272

Switching a GPIO Pin Connection between Analog and Digital Sources in PSoC® 4 - KBA90272

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Question: In PSoC® 4, I want to connect a GPIO output pin to an analog resource for some time and later operate the same pin as digital through firmware. How can this logic be implemented in a PSoC Creator project? What are the limitations on the sources to which a GPIO can be routed?



It is possible to switch a GPIO between different sources. Each port in PSoC 4 has a dedicated High Speed I/O Matrix (HSIOM) (register. The value in this register determines the source which is connected to each GPIO pin in that particular port. Each HSIOM register is 32-bit wide, where four bits are allocated for each pin in that port. Table 1 shows the possible 4-bit register values for each port pin:

Table 1. HSIOM Port Settings

Note: HSIOM PORT_SELx (‘x’ denotes port number and 'y' denotes pin number)

    Bits    Name    Value    Description
    4y+3: 4y    SEL'y'         Selects the pin ’y’ source (0 ≤y ≤ 7)
    GPIO    0    The pin is regular firmware-controlled GPIO, or connected to a dedicated hardware block.
    GPIO_DSI    1    The output is firmware-controlled, but OE is controlled from DSI.
    DSI_DSI    2    Both output and OE are controlled from DSI.
    DSI_GPIO    3    The output is controlled from DSI, but OE is firmware-controlled.
    CSD_SENSE    4    The pin is a CSD sense pin (analog mode).
    CSD_SHIELD    5    The pin is a CSD shield pin (analog mode).
    AMUXA    6    The pin is connected to AMUXBUS-A.
    AMUXB    7    The pin is connected to AMUXBUS-B. This mode is also used for CSD GPIO charging.When CSD GPIO charging is enabled in CSD_CONTROL, the digital I/O driver is connected to the CSD Charge signal (the pin is still connected to AMUXBUS-B).
    ACT_0    8    The pin-specific Active source #0 (TCPWM).
    ACT_1    9    The pin-specific Active source #1 (SCB UART).
    ACT_2    10    Reserved.
    ACT_3    11    Reserved.
    LCD_COM    12    The pin is an LCD common pin. This mode remains active and usable in Deep-Sleep mode (if the LCD block is enabled and configured correctly).
    LCD_SEG    13    The pin is an LCD segment pin. This mode remains active and usable in Deep-Sleep mode (if the LCD block is enabled and configured correctly).
    DPSLP_0    14    The pin-specific Deep-Sleep source #0 (SCB I2C, SWD, or Wakeup).
    DPSLP_1    15    The pin-specific Deep-Sleep source #1 (SCB SPI).

For example, assume that one pin needs to perform as a firmware-controlled logic output and an IDAC output, alternately. Perform the following steps to implement this scheme.

  1.   Place an analog pin named “Pin_1” and a current DAC “IDAC_1” in the project’s TopDesign.cysch file.

       Configure the pin with both Analog and Digital Output settings, as shown in Figure 1.


       Figure 1. Pin_1 Configured as both Analog and Digital




       Connect IDAC_1 to the analog terminal, as shown in Figure 2.


       Figure 2. Pin_1 connected with IDAC_1



  4.   Build the project to create the necessary APIs.
  5.   Add the following code snippet in your main.c file to switch Pin_1 between IDAC and firmware approximately every 1 second.  
      IDAC_1_Start();for(;;)     {         /* Place your application code here. */  /* Connecting pin 1 to Amux bus where the 8 bit IDAC_1 is connected */  Pin_1_SetDriveMode(Pin_1_DM_ALG_HIZ);   CY_SET_REG32(Pin_1__0__HSIOM, (CY_GET_REG32(Pin_1__0__HSIOM) & ~(Pin_1__0__HSIOM_MASK)));   CY_SET_REG32(Pin_1__0__HSIOM, (CY_GET_REG32(Pin_1__0__HSIOM) | (0x06 << Pin_1__0__HSIOM_SHIFT)));   /* Delay for 1 second */  CyDelay(1000);  /* Removing Pin_1&apos;s connection from Amux bus and settin it to strong drive mode*/ Pin_1_SetDriveMode(Pin_1_DM_STRONG);  CY_SET_REG32(Pin_1__0__HSIOM, (CY_GET_REG32(Pin_1__0__HSIOM) & ~(Pin_1__0__HSIOM_MASK)));  /* Setting Pin_1 component to be operated by firmware */ CY_SET_REG32(Pin_1__0__HSIOM, (CY_GET_REG32(Pin_1__0__HSIOM) | (0x00 << Pin_1__0__HSIOM_SHIFT)));  for(i=0; i<5; i++)  {      Pin_1_Write(0);      CyDelay(100);             Pin_1_Write(1);             CyDelay(100);         }      }

Limitations in Switching GPIOs Between Different Sources


       It is not directly possible to switch a GPIO between TCPWM or SCB or any other Fixed Function block and an analog block if the chosen GPIO pin is not a dedicated pin for these fixed resources. This also applies for a pin switching between UDBs and an analog block. This is because connections to AMUXBUSA / AMUXBUSB make use of DSI registers for configuration and hence the DSI signals cannot be dedicated for UDBs. To know the dedicated pins for TCPWM, SCB, and other fixed function blocks, refer to PSoC 4 architecture TRM.


       If your application requires such a scenario, then you must set the HSIOM nibble corresponding to the pin to four (equivalent to AMUXBUSA) or five(equivalent to AMUXBUSB). It is better to enable the OE terminal in the GPIO, which is being switched between different sources and keep the OE terminal connected to logic ‘1’ for proper operation.

       None of the port 4 pins can be routed through the DSI. However, these pins can still be used as a firmware pin, LCD_COM, LCD_SEG, or can be connected to the SCB block through the HSIOM.