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Knowledge Base Articles

Resources Available in Power Modes in PSoC 4 and PSoC 6 MCU - KBA229035

ChaitanyaV_61
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Resources Available in Power Modes in PSoC 4 and PSoC 6 MCU - KBA229035

Author: LinglingG_46         Version: *A

 

Translation - Japanese: PSoC 4 および PSoC 6の異なる電力モードで利用可能なリソース - KBA229035 - Community Translated (JA)

 

PSoC 4 Family:

PSoC 4 features five power modes of operation, which include Active, Sleep, Deep Sleep, Hibernate, and Stop. Table 1 lists the PSoC 4 resources and the availability in different power modes.

 

Table 1. PSoC 4 Power Modes – Resources Availability

Subsystem

Active

Sleep

Deep Sleep

Hibernate

Stop

CPU

ON

Retention

Retention

OFF

OFF

SRAM

ON

ON

Retention

Retention

OFF

High-speed peripherals (SPI, UART, and so on)

ON

ON

Retention

OFF

OFF

Universal Digital Blocks (UDBs)

ON

ON

Retention

OFF

OFF

VDAC

ON

ON

Retention

OFF

OFF

SPI slave and I2C slave (SCB based)

ON

ON

ON

OFF

OFF

High- speed clock (IMO, ECO, and PLLs)

ON

ON

OFF

OFF

OFF

Low-speed clock (32 kHz) (ILO and WCO)

ON

ON

ON

OFF

OFF

Brown-out detection

ON

ON

ON

ON

OFF

CTBs/CTBms (opamp and comparators)

ON

ON

ON

OFF

OFF

ADC

ON

ON

OFF

OFF

OFF

Low-power comparators

ON

ON

ON

ON

OFF

GPIO (output state)

ON

ON

ON

ON

Frozen


PSoC 6 Family:

PSoC 6 MCU features seven power modes of operation.  The system powers are Low-Power (LP), Ultra-Low-Power (ULP), Deep Sleep, and Hibernate. The Arm® CPU power modes are Active, Sleep, and Deep Sleep, and are available in the system LP and ULP power modes.

 

Table 2 lists the PSoC 6 MCU resource availability in different power modes.

 

Table 2. Resources Available in Different Power Modes

Component

System Power Modes

LP

ULP

Deep Sleep

Hibernate

XRES

Power Off with Backup

CPU active

CPU Sleep/Deep Sleep

CPU Active

CPU Sleep/Deep Sleep

Core function

 

CPU

ON

Sleep

ON

Sleep

Retention

OFF

OFF

OFF

SRAM

ON

ON

ON

ON

Retention

OFF

OFF

OFF

Flash

Read/Write

Read/Write

Read only

Read only

OFF

OFF

OFF

OFF

High-Speed Clock (IMO, ECO, PLL, FLL)

ON

ON

ON

ON

OFF

OFF

OFF

OFF

LVD

ON

ON

ON

ON

OFF

OFF

OFF

OFF

ILO

ON

ON

ON

ON

ON

ON

OFF

OFF

Peripherals

 

SMIF

ON

ON

ON

ON

Retention

OFF

OFF

OFF

UDB

ON

ON

ON

ON

OFF

OFF

OFF

OFF

SAR ADC

ON

ON

ON

ON

OFF(1)

OFF

OFF

OFF

CTBm

ON

ON

ON

ON

ON (lower GBW)

OFF

OFF

OFF

CTDAC

ON

ON

ON

ON

Retention

OFF

OFF

OFF

Analog Reference

ON

ON

ON

ON

ON

OFF

OFF

OFF

LPCMP

ON

ON

ON

ON

ON

ON

OFF

OFF

TCPWM

ON

ON

ON

ON

OFF

OFF

OFF

OFF

CSD

ON

ON

ON

ON

Retention

OFF

OFF

OFF

BLE

ON

ON

ON

ON

Retention

OFF

OFF

OFF

LCD

ON

ON

ON

ON

ON

OFF

OFF

OFF

SCB

ON

ON

ON

ON

Retention (I2C/SPI wakeup available)

OFF

OFF

OFF

GPIO

ON

ON

ON

ON

ON

Freeze

OFF

OFF

Watchdog timer

ON

ON

ON

ON

ON

ON

OFF

OFF

Multi-Counter WDT

ON

ON

ON

ON

ON

OFF

OFF

OFF

Reset

 

XRES

ON

ON

ON

ON

ON

ON

ON

OFF

POR

ON

ON

ON

ON

ON

ON

OFF

OFF

BOD

ON

ON

ON

ON

ON

OFF

OFF

OFF

Watchdog reset

ON

ON

ON

ON

ON

ON

OFF

OFF

Backup domain

 

WCO,RTC,alarms

ON

ON

ON

ON

ON

ON

ON

ON

 

(1) SAR ADCs in PSoC 62S4 can operate in Deep Sleep

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Last update:
‎May 05, 2021 10:29 AM
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