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OPTIREG™ TLF35584 PMIC: Functional watchdog servicing issues

OPTIREG™ TLF35584 PMIC: Functional watchdog servicing issues

Infineon_Team
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50 replies posted 25 likes received 25 replies posted

The following are a few functional and servicing issues that may occur while testing the PMIC:

What should I do when the question does not update and the watchdog service is not proper after enabling the functional watchdog for TLF35584?

  • A functional or question/answer watchdog is integrated in the TLF35584 to monitor the microcontroller. In a steady state, a question is generated (taken out of a table). Simultaneously, the heartbeat counter starts counting from zero.
  • The heartbeat counter counts until the heartbeat period ends. The duration of the heartbeat period is set to a default value, but can be adjusted via a SPI command.
  • The question consists of 4 bits. The expected answer consists of four responses of 8 bits each.
  • The four responses shall be sent before the heartbeat period ends. To reset the heartbeat counter, the last response shall be written to the synchronized response register.
  • The flowchart (in page 234 of the datasheet) for the operation of functional watchdog shows the condition, when TLF35584 generates a new question.

For failure cases and timing diagrams, see Section 15.3.1 in the datasheet

What should I do if the behavior is not as expected because of a missed response, even when the FWD is properly serviced after the faulty case?

  • The response counter will not reset after the heartbeat counter expires. To keep the FWD on the green path, use a recovery code that generates a dummy response to replace the missing responses. This is illustrated with an example in the following figures.
  • The green path (as depicted in Fig. 1) resets the response counter. To avoid FWD error counter overflow, the MCU can serve four valid responses accordingly.
  • To make the code robust, read the response counter and provide the response. This should be done separately for each response, which may delay the heartbeat time requirement. This may compromise the code robustness.

KA-15151_image1.jfif

Figure 1: FWD flowchart for missing response

For missed response scenarios, see Section 15.3.1.4 in the datasheet

 
KA-15151_image2.jfif
Figure 2: change in response counter (tabular representation)
 
Figure 2 shows the change in response counter and the need for a dummy bit to reset the response counter and make a valid service to FWD.
 
KA-15151_image3.png

 

Figure 3: change in response counter (pictorial representation)
 
Figure 3 shows the change in response counter and the need for dummy bit to reset the response counter and make a valid service to FWD in pictorial view.
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