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Memory: NOR Flash - The Purpose of ‘HOLD#’ Function

Memory: NOR Flash - The Purpose of ‘HOLD#’ Function

ChaitanyaV_61
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Author: AlbertB_56       

Translation - Japanese: サイプレスSPI NORフラッシュメモリ製品の「HOLD#」機能の目的 - KBA229044 - Community Translated (JA)

What is the purpose of the 'HOLD#' function in NOR Flash?


The purpose of the HOLD# function is to pause serial communications between the SPI Flash memory device and the microcontroller without deselecting the SPI Flash or stopping the SCLK. The HOLD function is useful when multiple devices share the same SPI I/O bus. It is important to note that the logic state of the SPI interface remains undisturbed as long as CS# remains active LOW during the entire HOLD condition. During the HOLD condition, any ongoing embedded operation (PROGRAM or ERASE) will not be terminated.

It is also essential to note that the HOLD# function is not available when the SPI Flash is in Quad Mode (CR1[1] = 1) because IO3 replaces the HOLD function for input and output of addresses and data during Quad mode.

The HOLD function is not the same as the PROGRAM Suspend or ERASE Suspend operation. PROGRAM and ERASE Suspend enable the READ operation from any ‘non-program-suspend’ sector or ‘non-erase-suspend’ sector and allow the system to interrupt a program or erase operation. In contrast, the HOLD function is an input-signal generated function, and the PROGRAM Suspend or ERASE Suspend functions are command-generated operations, valid only during a program or erase operation.

To initiate the HOLD condition, select the device by driving the CS# input LOW. It is recommended that you keep the CS# input LOW throughout the Hold condition to ensure that the state of the interface logic remains unchanged from the start of the Hold condition. If the CS# input is driven HIGH while the device is in the Hold condition, the device's interface logic will be reset. The Hold condition starts on the falling edge of the HOLD# signal, provided that it coincides with SCK being LOW. If the falling edge does not coincide with the SCK signal being LOW, the Hold condition starts whenever the SCK signal reaches LOW.

 

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Figure 1. HOLD Mode Operation

The Hold condition ends on the rising edge of the HOLD# signal, provided that it coincides with the SCK signal being LOW. If the rising edge does not coincide with the SCK signal being LOW, the Hold condition ends when the SCK signal reaches LOW.

Note that not all SPI NOR FLASH memory products have the HOLD function. See the respective SPI device datasheet for specific details. For more information, refer to page 10 of the S25FL128S/FL256S datasheet.

Reference (pg. 10) :  S25FL128S/FL256S datasheet

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