Interpreting the DMA_RDY Flag of the GPIF™ II Block of FX3 – KBA90743
Question: How should the DMA_RDY flag be interpreted by the external master interfaced to the General Programming Interface II (GPIF™II) slave of FX3?
The terminology “DMA_RDY” is not quite correct when it is interpreted with respect to the master-slave interface between the GPIF II block of FX3 and the external master. For the master-slave interface, this flag’s functionality is presented in the following two cases:
For a channel that outputs data to the P-port (to an external chip or device), the DMA_RDY flag indicates whether there is data ready to be read out from any of the buffers. If there is at least one buffer with data committed to the P-port, the DMA_RDY flag is deasserted. It is essentially an empty flag in this case.
For a channel that inputs data to the P-port (from an external chip or device), the DMA_RDY flag indicates whether there is buffer area available to write into. If there is at least one buffer available to be filled with data, the DMA_RDY flag is deasserted. It is essentially a full flag in this case.
The polarity of this flag can be set in GPIF II Designer.
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