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Input signal needed to be sure 2EDN output goes HIGH/LOW

Input signal needed to be sure 2EDN output goes HIGH/LOW

Infineon_Team
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50 replies posted 25 likes received 25 replies posted

2EDN has LV-TTL thresholds for logic decision. Please use max. and min. values to get proper functionality. LV-TTL means low voltage two transistor levels. This is independent to power supply VDD.
For input voltage levels higher than 5V, a resistive voltage divider brings timings back to the symmetric slope rate between high and low.

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