I/O status of Ultra 37K CPLD during programming
Anonymous
Not applicable
Jan 26, 2012
10:11 AM
- Subscribe to RSS Feed
- Mark as New
- Mark as Read
- Bookmark
- Subscribe
- Printer Friendly Page
- Report Inappropriate Content
Jan 26, 2012
10:11 AM
Question: What is the status of all I/Os of Ultra 37K CPLD during programming?
Answer:
All I/Os (except TDO) are tristated during device programming. This allows soldering the devices directly onto user board without having to erase them first. It allows the user to power-up a board and program the CPLD devices on it without worrying whether their initial, non-blank state will cause any problems such as output contention with other devices on the board.
Please be noted our entire Cypress CPLD product are Obsolete and not recommended for new design and development. For more information on CPLD product, please visit our webpage: http://www.cypress.com/go/cpld
- Tags:
- clocks & buffers
Rate this article:
Contributors
-
This widget could not be displayed.Anonymous