Tip / Sign in to post questions, reply, level up, and achieve exciting badges. Know more

cross mob

How to Turn Off PSoC6 I2C Slave Clock Stretching

How to Turn Off PSoC6 I2C Slave Clock Stretching

Vison_Zhang
Moderator
Moderator
Moderator
750 replies posted 250 sign-ins 250 solutions authored

Question

How to turn off PSoC6 I2C Slave Clock Stretching feature. 

Answer

By default, PSoC6 I2C slave clock stretching doesn't occur on data bytes (except internal FIFO is full), only occur between w/r bit and ACK of "address+r/w" bytes, and there has no config parameter to turn it off in GUI.  When I2C master do write & read action, the signals on the I2C BUS are shown as below:

I2C Master Write:Enable Clock Stretching W.PNG

I2C Master Read:Enable Clock Stretching R.PNG

In some situation, this clock stretching delay is not acceptable to design. When you met such issue, you can try to use below code to turn off the clock stretching between w/r bit and ACK of "address+r/w" bytes.

Cy_SCB_I2C_Init(CYBSP_I2C_HW, &CYBSP_I2C_config, &CYBSP_I2C_context);

/* When '1', a received (matching) slave address is immediately ACK'd when the receiver FIFO is not full” */
SCB_I2C_CTRL(CYBSP_I2C_HW) |= _VAL2FLD(SCB_I2C_CTRL_S_READY_ADDR_ACK, 1UL);

Cy_SCB_I2C_Enable(CYBSP_I2C_HW);

After use this method, the signals on the I2C BUS are shown different:

I2C Master Write:Disable Clock Stretching W.PNG

I2C Master Read:Disable Clock Stretching R.PNG

0 Likes
229 Views