How does ERR bit set in SPIDER+ in parallel usage?
Sep 03, 2023 01:39 PM
In case of parallel usage of OUT0 and OUT2
If both channel were latched by overload, both ERR0 and ERR2 are set.
If customer would clear the ERR bit by HWCR_OCL.OUTn command, they have to reset both ERR0 and ERR2.
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