Generation of non-overlapping clocks (PWMs with Dead Band)
Question: How to generate non-overlapping PWM signals in PSoC1?
For many switching systems, non-overlapping clocks are required. It can be generated using a couple of digital blocks and is available as PWMDB user module (UM) in PSoC Designer. The UM gives you an option of configuring the duration (Dead Time) for which both the clocks are held low. This parameter can also be controlled using an external signal connected to the Kill terminal of UM.
Attached project demonstrates the implementation of PWMDB for generation of non-overlapping clocks using CY8C29466 device. This project does not apply to CY8C2xx45 and CY8C28xxx device families because architecture of Digital Blocks in these device families is different and allows you to configure the dead band functionality using a single digital block.