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FX3 FAQs - KBA224051

FX3 FAQs - KBA224051

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50 questions asked 10 questions asked 5 questions asked

Author: HirotakaT_91                     Version: *G

Hardware

Question: The FX3 datasheet does not list the Absolute Maximum Ratings of VBATT/VBUS. Does this mean that it is possible to exceed 6 V?
Answer: No. VBATT supply voltage which is described in Operating Conditions is 3.2 V to 6 V; therefore, it must not exceed 6 V.

Question: Is it possible to generate 1.2 V from a 3.3-V FPGA’s power supply using CYUSB3KIT-003?
Answer: No. FX3 does not have a function to regulate voltage supplied FPGA.

Question: If FX3 SuperSpeed lines are connected to HX3, is it mandatory to connect ESD devices for SuperSpeed lines of HX3 and FX3?
Answer: No, it is not. HX3 has internal an ESD protection device circuitry for up to 2.2 kV (HBM). If additional protection is required, you can add ESD devices on the SuperSpeed lines of FX3.

Question: How can I decide the address settings of Microchip 24LC256 EEPROM as shown in AN76405?
Answer: FX3 can connect to up to eight Microchip 24LC256 devices. Table 1 shows the details of four Microchip 24LC256 EEPROM devices connected.

Table 1

Device No.

Address Range

A2

A1

A0

Size

1

0x00000-0x07fff

0

0

0

32 KB

2

0x08000-0x0ffff

0

0

1

32 KB

3

0x10000-0x17fff

0

1

0

32 KB

4

0x18000-0x1ffff

0

1

1

32 KB

For more information, see the Microchip 24LC256 datasheet.

Question: Is there a recommendation for the number of PCB layers?
Answer: It is recommended to use at least 4-layer PCB. There is not restriction on the maximum number of layers.

Question: Why does FX3 stop after being testing for ESD test?
Answer: Check your test method again and ensure that test settings are correct.

Note that FX3 has built-In ESD protection levels for D+/D- and GND pins:

  1. ±2.2-kV human body model (HBM) based on JESD22-A114 Specification
  2. ±6-kV contact discharge and ±8-kV air gap discharge based on IEC61000-4-2 level 3A
  3. ±8-kV Contact Discharge and ±15-kV Air Gap Discharge based on IEC61000-4-2 level 4C.

Note that the built-In ESD protection level for SSRX+, SSRX-, SSTX+, and SSTX- pins is ±2.2-kV human body model (HBM). Because SuperSpeed differential data lines only have ±2.2-kV HBM protection level, the silicon cannot be subjected to IEC61000-4-2 level 3A/4C testing without using appropriate external ESD protection circuit.

If ESD protection is needed for pins which do not have built-In ESD pins, connect to an external ESD protection circuit.

If you use FX3 via a hub such as HX3, you should consider the hub's ESD protection level also.

Question: What is the recommendation to reduce power consumption?
Answer: Use only required GPIOs. Shorten the GPIF-II signal lines to decrease the capacitance on the lines. A lower frequency for GPIF-II PCLK will be effective even though it reduces the GPIF-II throughput. Changing to low-power modes on the firmware is also helpful. See the CyU3PSysEnterStandbyMode() or CyU3PSysEnterSuspendMode() function in the FX3 API Guide (FX3APIGuide.pdf) in \Cypress\EZ-USB FX3 SDK\1.3\doc\firmware to modify your firmware power mode.

Question: Can I leave unused GPIOs unconnected?
Answer: Yes, you can leave the unused GPIOs unconnected.

Question: Can I connect an external clock to the XTALIN pin instead of a crystal?
Answer: No, you cannot connect an external clock to the XTALIN pin. FX3 allows either a crystal to be connected between the XTALIN and XTALOUT pins, or an external clock to be connected at the CLKIN pin. In addition, an unstable input clock from the crystal or an external clock to FX3 causes an unstable behavior on all the derived clocks for different internal blocks within FX3.

Firmware

Question: Does the DMA transfer stop if CY_U3P_DMA_ERROR is detected at least once? Is there any way to cancel the error and resume the DMA transfer?
Answer: After error detection, even if a DMA transfer request occurs again, the transfer will not be executed. Although it is possible to cancel the error and resume DMA transfer, Cypress recommends that you avoid situations that cause the error condition.

Question: Is there a ISOC transfer sample project for AN75779?
Answer: There is no ISOC transfer sample project for AN75779. To make ISOC UVC firmware for AN75779, use the USBVideoClass example available in the EZ-USB FX3 SDK in the following path: \Cypress\EZ-USB FX3 SDK\1.3\firmware\uvc_examples\cyfxuvcinmem

Question: How to check the GPIF II state? Do you have any examples?
Answer: The following code is an example of confirming GPIF II state:

uint8_t curState_p;

CyU3PGpifGetSMState(&curState_p);

CyU3PDebugPrint (4, "Current status = %d\r\n", curState_p);

The GPIF II state value can be seen in cyfxgpif2config.h. Check it with the return value of CyU3PGpifGetSMState. Its return value can be used only for debugging purpose. For more information, see the FX3 API Guide (FX3APIGuide.pdf) in \Cypress\EZ-USB FX3 SDK\1.3\doc\firmware.

Question: In the AN75779 example, I enabled BACKFLOW_DETECT. When the FX3 firmware calls CyU3PGpifDisable(), FX3 occasionally stops responding. Why does it happen?
Answer: It may happen because of PIB/GPIF error interrupts invoked in the application. If you enable BACKFLOW_DETECT, you need to mask the PIB/GPIF error. Use the CyU3PVicDisableAllInterrupts() function on the AN75779 example; even if all interrupts are disabled, it creates no issues. If your program based on the AN75779 example uses another interrupt, mask the PIB/GPIF error interrupt.

There are example codes to use CyU3PVicDisableAllInterrupts() or mask the PIB/GPIF error. If you use CyU3PVicDisableAllInterrupts(), declare cyu3vic.h in the firmware code. If you mask the PIB/GPIF error, declare pib_regs.h in the firmware code.

uint32_t intstate = CyU3PVicDisableAllInterrupts();

CyU3PGpifDisable (CyFalse);

CyU3PVicEnableInterrupts (intstate);

PIB->intr_mask &= ~(CY_U3P_PIB_INTR_PIB_ERR | CY_U3P_PIB_INTR_GPIF_ERR);

CyU3PGpifDisable (CyFalse);

PIB->intr_mask |= (CY_U3P_PIB_INTR_PIB_ERR | CY_U3P_PIB_INTR_GPIF_ERR);

Question: The D8h command on Control Center does not erase the SPI Flash (S25FS128S). How should I do perform this operation?
Answer: Use the cyfxusbspidmamode example in the EZ-USB FX3 SDK (\Cypress\EZ-USB FX3 SDK\1.3\firmware\serialif_examples\cyfxusbspidmamode) supports the D8h erase command.

This firmware can erase / read / write to SPI flash devices from the USB interface. FX3 with this firmware enumerates as a custom device communicating with the cyUsb3.sys driver and provides a set of vendor commands that can access SPI Flash devices.

Test your design with this project and identify the point where you encounter errors.

Question: Can I configure GPIO[0]-[7] as GPIO if GPIF-II is not used?
Answer: Yes. Use the CyU3PDeviceGpioOverride() API function to override the pin, and then use CyU3PGpioSetSimpleConfig() or CyU3PGpioSetComplexConfig() to configure the pin. Use the example firmware at \Cypress\EZ-USB FX3 SDK\1.3\firmware\serialif_examples\cyfxgpioapp.

Question: Which project is referred to create a multiple threads in FX3?
Answer: You can refer to FX3 Code Examples. For example, cyfxgpiocomplexapp uses three threads.

Question: When I use the cyfxUsbUart example and send data continuously for a long time without hardware flow control, transferred data is sometimes lost. How can I send data without corruption?
Answer: If you use UART for communication, to ensure that there is no data corruption or loss, you must use hardware flow control.

Question: If FX3 sends a lot of data with a high transfer rate using the cyfxUsbUart example, which mode should I use, Register mode or DMA mode?
Answer: You should select DMA mode to achieve high transfer rate. DMA mode is used for transferring large amounts of data. In case FX3 transfers data with Register mode, the following steps will occur:

  1. Firmware reads every data byte.
  2. Firmware invokes callback for every byte.
  3. Firmware invokes the CyU3PUartReceiveBytes() function to store this data to the data buffer.

If there is no hardware flow control, the UART transmitter does not consider the firmware delays and continuously transfers data with the defined transfer rate, which may lead to buffer overflow.

Question: How can I use D-cache?
Answer: You can call CyU3PDeviceCacheControl(CyTrue, CyTrue, CyTrue) to initialize and enable D-cache.

Note: Note that once D-cache is enabled, all buffers used for DMA in the system must be cache line aligned. This means that all DMA buffers must be 32-bytes aligned and in 32-byte multiples. This is ensured by the CyU3PDmaBufferAlloc() function. Any buffer allocated outside of this function must follow the 32-bytes alignment / multiple rule. This rule is also applicable for all DMA buffer pointers passed to library APIs including the USB descriptor buffers assigned using CyU3PUsbSetDesc(), data pointers provided to CyU3PUsbSendEP0Data(), CyU3PUsbGetEP0Data(), CyU3PUsbHostSendSetupRqt(), etc.

The following is an example to align the USB descriptor buffer with 32 bytes.

const uint8_t CyFxUSB30DeviceDscr[] __attribute__ ((aligned (32)))

GPIF-II

Question: When FX3 handles 10 bits/pixel data, what should be the GPIF II size?
Answer: GPIF II supports 8-bit, 16-bit, 24-bit, and 32-bit widths. In this case, set the GPIF II size to 16-bit. Because FX3 receives data every clock cycle, handle the extra 6 bits per pixel appropriately in the Host application.

Question: Can FX3 pack YUV422 data for the 32-bit GPIF-II bus?
Answer: No, FX3 cannot pack the YUV422 data because packing the data depends on the sensor specification that you want to use. If your sensor packs YUV422 data to 32 bits, FX3 can realize approximately 3.2 Gbps bandwidth during transfer.

Question: What is the bit allocation in DQ [31: 0] when YUV422 data is sent by image sensor?
Answer: YUV422 8-bit data transmission is performed by the image sensor transmitting a YUY2 or UYVY sequence. Therefore, if the sensor can pack the data into 32 bits, the data allocation is as follows.

YUY2 sequence:

Y1

U1

Y2

V1

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

DQ [0: 7] Y1, DQ [8: 15] U1, DQ [16: 23] Y2, DQ [24: 31] V1

UYVY sequence:

U1

Y1

V1

Y2

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

0

1

2

3

4

5

6

7

DQ [0: 7] U1, DQ [8: 15] Y1, DQ [16: 23] V1, DQ [24: 31] Y2

AN75779 example descriptor sets YUY2 sequence on VS format descriptor by default.

See the MIPI Alliance Specification for Camera Serial Interface 2 for more information.

Question: Can I configure GPIF as 24-bit in the Slave FIFO example?

Answer: Yes, you can configure GPIF as 24-bit in the Slave FIFO example.

Do the following:

  1. Open the GPIF project provided with AN65974.
  2. Select 24 bit as Data Bus width in the Interface settings.
  3. Save it and build the project by clicking Build > Build Project to generate the cyfxgpif2config.h file.
  4. Set CY_FX_SLFIFO_GPIF_16_32BIT_CONF_SELECT to ‘0’ in the cyfxslfifosync.h file.
  5. Build the project. This step generates the image file for the 24-bit Slavefifo application.

Note: When the data bus width is changed to 24-bit, the address lines are mapped to GPIO 41 (A1) and GPIO 42 (A0), unlike GPIO 28 (A1) and GPIO 29 (A0) in the case of both 16-bit and 32-bit bus widths. Pin mapping for address lines may change based on the number of control lines, data bus width, and number of address lines selected. Ensure that the external processor drives the address lines that are mapped to the GPIF interface per the selected bus width, number of address lines, and number of control lines.

Host application

Question: Is XferData() a thread-safe API?
Answer: When each thread accesses different FX3 endpoints, it is adopted thread-safe. However, when each thread accesses the same FX3 endpoint, it is not adopted thread-safe. Because the CyUSB library does not restrict access to the same endpoint by multiple threads, programmer must pay attention to it.

Question: Can Control Center store the firmware written date and time information?
Answer: No. The date and time information are not written by Control Center into I2C EEPROM while programming the firmware. Control Center takes only the image file (which does not have an entry for date and time) and programs it into the I2C EEPROM.

Question: Does Control Center have a verification feature?
Answer: Yes. Control Center verifies the data after firmware is programmed into the I2C EEPROM. For more information, see the Control Center source code available on the EZ-USB FX3 Software Development Kit web page.

Other Queries

Question: Where can I get the IBIS model for CYUSB3014?
Answer: CYUSB3014 IBIS URL is available at http://www.cypress.com/documentation/models/cyusb3014-fx3-ibis-model.

Cypress does not have any other IBIS models for CYUSB3014.

Question: On AN75779, CYUSB3KIT-001 is used as an example EVK, but can I use CYUSB3KIT-003 instead?
Answer: Yes. Cypress recommends using CYUSB3KIT-003 instead of CYUSB3KIT-001 because it is newer and cheaper.

Question: Does Cypress share the Cypress Windows Device Driver source file?
Answer: The Windows device driver source is available as part of the CYUSB3_Suite_Source on the FX3 SDK web page.

http://japan.cypress.com/documentation/software-and-drivers/ez-usb-fx3-software-development-kit

Question: What sample firmware should we use for compliance test?
Answer: Please use “cyfxbulksrcsink” firmware example for each compliance test.

Question: Where can I get the global identifiers for all supported media types and their corresponding GUID values?
Answer:  The standard Universal Video Class (UVC) driver supplied by Microsoft supports many media types. Each media type has a unique 16-byte identifier known as Global Unique Identifier (GUID).

For example, the GUID of YUY2 media type is defined as — {32595559-0000-0010-8000-00AA00389B71}. The layout of the YUY2 GUID data structure is shown below:

Offset

Field

Size (Bytes)

Example

0

Data1

4

32595559

4

Data2

2

0000

6

Data3

2

0010

8

Data4a

1

80

9

Data4b

1

00

10

Data4c

1

00

11

Data4d

1

AA

12

Data4e

1

00

13

Data4f

1

38

14

Data4g

1

9B

15

Data4h

1

71

Therefore, the little-endian-byte stream representation of GUID would be: {0x59,0x55,0x59,0x32,0x00,0x00,0x10,0x00, 0x80,0x00,0x00,0xAA, 0x00,0x38,0x9B,0x71}

The GUID values for all supported media data types are available here.

Related Documents

Datasheets:

EZ-USB® FX3: SuperSpeed USB Controller

Application Notes:

Guides:

Frequently accessed Knowledge Base Articles:

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