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Detecting BOD Reset in PSoC 4 – KBA228415


Detecting BOD Reset in PSoC 4 – KBA228415

Author: AH_96           Version: **

Translation - Japanese: PSoC 4 で BOD Reset を検出する - Community Translated (JA)

The BOD (Brown Out Detection) circuit protects the operating or retaining logic from possibly unsafe supply conditions by applying reset to the device. The BOD  circuit monitors the VCCD voltage and generates a reset if the voltage level dips below the minimum VCCD voltage required for safe operation. The system will not come out of RESET until the supply is detected to be valid again. In some BOD events, VCCD will fall below the minimum logic operating voltage, but remain above the minimum logic retention voltage.

If VCCD dips below the minimum logic operating voltage, but not below the minimum logic retention voltage, a BOD reset occurs; but the register values are retained. If VCCD dips below both minimum operating and minimum retention voltage, a BOD reset occurs without retention of registers. This register retention can be detected using a special register, PWR_BOD_KEY. The PWR_BOD_KEY register changes value only when written by firmware or when a non-retention reset such as a non-retention BOD, XRES, or POR event occurs.

Brown out reset can be detected by adding the following code to the application.

int Check_BOD(void)


    //Check the present value of CYREG_PWR_BOD_KEY register

    uint32 key = CY_GET_REG32(CYREG_PWR_BOD_KEY);


    //set CYREG_PWR_BOD_KEY register to 0x3A71



    //if key is 0x3A71, it indicates that the program was reset due to Brown out

    return (key == 0x3A71);


int main (void)




        //BOD Detected.





        /* Place your application code here. */



However, CYREG_PWR_BOD_KEY will be retained when the device wakes up from Hibernate. Therefore, the reset condition must be checked. The reset condition for Hibernate can be checked by using


If this condition returns TRUE, it indicates that the reset reason was Hibernate and BOD need not be checked.


  1. PSoC 4100/4200 Family PSoC® 4 Architecture TRM
  2. PSoC 4100/4200 Family PSoC 4 Registers TRM (Technical Reference Manual)
Version history
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Last update:
‎Sep 11, 2019 09:35 PM
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