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SPI NOR flash reference schematic - KBA230681

SPI NOR flash reference schematic - KBA230681

ChaitanyaV_61
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Author: SudheeshK_26            Version: **

Translation - Japanese: Cypress SPI NOR Flash Memoryのリファレンス回路図 - KBA230681- Community Translated (JA)

Question:
Is there any reference schematic for Cypress SPI NOR flash devices available?

Answer:

Infineon SPI NOR flash devices can be directly connected to memory controllers. However, you must use a simple pull-up resistor on the CS# signal for proper power-up and power-down. Figure 1 shows a SPI NOR flash device reference schematic using S25FL512S.

Reference Schematic Diagram

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Best practices:

  1. Use IBIS models from Infineon to simulate signal integrity before finalizing the design:
    (a) Standard QSPI flash IBIS models

    (b) SEMPER™ flash IBIS models
  2. Based on simulations of signal integrity, add series termination resistors to SPI signals. The recommended series termination resistor values are 33 Ω, 66 Ω, and 100 Ω.
  3. HOLD#, WP#, and RESET# pins have a low internal pull-up resistor; leave these open if not used.
  4. Keep NC, DNU, and RFU pins unconnected.

See AN98508 for Infineon serial flash device layout guidelines

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