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Creating PSoC® 6 UART project without UART component- KBA233876

Creating PSoC® 6 UART project without UART component- KBA233876

ArunKumarChoul
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Community Translation: UARTコンポーネントのないPSoC® 6 UARTプロジェクトの作成 – KBA233876

Version: **

Question:
How to create a basic PSoC® Creator project implementing UART functionality, without using UART component in TopDesign.cysch?

Answer:
The Universal Asynchronous Receiver/Transmitter (UART) protocol is an asynchronous serial interface protocol. UART communication is typically point-to-point. The interface consists of two signals: transmitter output and receiver input signals. Implementing UART functionality without UART component is useful in the scenarios, when there is a requirement to share hardware resources for different functionalities.

To implement this in the PSoC® Creator project, there is a need to add all the relevant source files for UART functioning. These files should be included in the ‘Source files’ folder of the PSoC® 6 core, where the UART program will be executed. These files are mentioned below -

  1. To begin with, cy_scb_uart.h header file provides UART API declarations of the SCB driver and cy_scb_uart.c provides UART API implementation of the SCB driver.
  2. UART.c file is added to provide the source code to the APIs of the UART component and UART.h header file defines the necessary constants and parameter values for the UART component.
  3. UART_SCBCLK.h file takes care of the source code to the APIs for the UART_SCBCLK component.
  4. The two files cy_scb_common.h and cy_scb_common.c files are added to the common APIs of the SCB driver and also for the proper implementation of the other linked header files such as cy_scb_uart.h.

Note: The above files can be used from the “Generated files” folder of an existing project, that has a UART component in TopDesign.cysch.

A basic PSoC® Creator project implementing the above has been explained further. It aims at printing the statement “Working in UART mode” in the serial terminal, without using the UART component in TopDesign.cysch.

  1. Add the necessary source files as explained above under the CM4 (core 1) of PSoC® 6 as shown in Error! Reference source not found..
    ArunKumarChoul_0-1638332880932.png
    Figure 1 Source files for UART
  2.  Include “UART.h” header file in the main.c to include all the API usage for UART functionality.
  3. The GPIO pins are configured to function as UART pins. The HSIOM register must be configured to connect dedicated SCB UART pins to the SCB block. Also, the UART output pins must be configured in Strong Drive Input off mode and UART input pins in Digital high-Z. This is shown in the below code:

    /* Assign pins for UART on SCB5: P5[0], P5[1] */
    #define UART_PORT               P5_0_PORT
    #define UART_RX_NUM             P5_0_NUM
    #define UART_TX_NUM             P5_1_NUM

    /* Connect SCB5 UART function to pins */
    Cy_GPIO_SetHSIOM(UART_PORT, UART_RX_NUM, P5_0_SCB5_UART_RX);      Cy_GPIO_SetHSIOM(UART_PORT, UART_TX_NUM, P5_1_SCB5_UART_TX);   

    /* Configure pins for UART operation */      Cy_GPIO_SetDrivemode(UART_PORT, UART_RX_NUM, CY_GPIO_DM_HIGHZ);
    Cy_GPIO_SetDrivemode(UART_PORT, UART_TX_NUM, CY_GPIO_DM_STRONG_IN_OFF);

  4. A clock source must be connected to the SCB block to oversample input and output signals. The system clock driver APIs are used to provide the UART clock divider type and number.

    /* Assign divider type and number for UART */
    #define UART_CLK_DIV_TYPE      (CY_SYSCLK_DIV_8_BIT)
    #define UART_CLK_DIV_NUMBER    (0U)

    /* Configure clocks for UART operation */
    Cy_SysClk_PeriphAssignDivider(PCLK_SCB5_CLOCK, UART_CLK_DIV_TYPE, UART_CLK_DIV_NUMBER);

  5. To get the UART to operate with the desired baud rate, the clk_scb frequency and the oversample must be configured. For example, in this project the baudrate is set to 115200 bps(standard mode). The calculation is explained below:

    UART baud rate = (clk_scb/oversample)
    For clk_peri as 50 MHz, the divider value = 36 and get clk_scb (SCB Clock) = (50 MHz / 36) = 1,389 MHz.
    Select oversample = 12. These setting results in UART data rate = 1,389 MHz / 12 = 115750 bps.
    /* Configure Baudrate for UART operation */     
    Cy_SysClk_PeriphSetDivider   (UART_CLK_DIV_TYPE, UART_CLK_DIV_NUMBER, 35UL);
    Cy_SysClk_PeriphEnableDivider(UART_CLK_DIV_TYPE, UART_CLK_DIV_NUMBER);

  6. The initialization code for the UART block uses the configuration structure as shown below:

    /* Initialize the UART operation */
    cy_en_scb_uart_status_t uart_status;
    uart_status = Cy_SCB_UART_Init(UART_HW, &UART_config, &UART_context);
    Cy_SCB_UART_Enable(UART_HW);

  7. Perform printing of the statement inside for loop() for the output of the project as shown in Figure 2.
    ArunKumarChoul_1-1638334094794.png

    Figure 2 Printing on the serial terminal

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