How to create a basic PSoC® Creator project implementing UART functionality, without using UART component in TopDesign.cysch?
The Universal Asynchronous Receiver/Transmitter (UART) protocol is an asynchronous serial interface protocol. UART communication is typically point-to-point. The interface consists of two signals: transmitter output and receiver input signals. Implementing UART functionality without UART component is useful in the scenarios, when there is a requirement to share hardware resources for different functionalities.
To implement this in the PSoC® Creator project, there is a need to add all the relevant source files for UART functioning. These files should be included in the ‘Source files’ folder of the PSoC® 6 core, where the UART program will be executed. These files are mentioned below -
Note: The above files can be used from the “Generated files” folder of an existing project, that has a UART component in TopDesign.cysch.
A basic PSoC® Creator project implementing the above has been explained further. It aims at printing the statement “Working in UART mode” in the serial terminal, without using the UART component in TopDesign.cysch.
/* Assign pins for UART on SCB5: P5, P5 */
#define UART_PORT P5_0_PORT
#define UART_RX_NUM P5_0_NUM
#define UART_TX_NUM P5_1_NUM
/* Connect SCB5 UART function to pins */
Cy_GPIO_SetHSIOM(UART_PORT, UART_RX_NUM, P5_0_SCB5_UART_RX); Cy_GPIO_SetHSIOM(UART_PORT, UART_TX_NUM, P5_1_SCB5_UART_TX);
/* Configure pins for UART operation */ Cy_GPIO_SetDrivemode(UART_PORT, UART_RX_NUM, CY_GPIO_DM_HIGHZ);
Cy_GPIO_SetDrivemode(UART_PORT, UART_TX_NUM, CY_GPIO_DM_STRONG_IN_OFF);
/* Assign divider type and number for UART */
#define UART_CLK_DIV_TYPE (CY_SYSCLK_DIV_8_BIT)
#define UART_CLK_DIV_NUMBER (0U)
/* Configure clocks for UART operation */
Cy_SysClk_PeriphAssignDivider(PCLK_SCB5_CLOCK, UART_CLK_DIV_TYPE, UART_CLK_DIV_NUMBER);
UART baud rate = (clk_scb/oversample)
For clk_peri as 50 MHz, the divider value = 36 and get clk_scb (SCB Clock) = (50 MHz / 36) = 1,389 MHz.
Select oversample = 12. These setting results in UART data rate = 1,389 MHz / 12 = 115750 bps.
/* Configure Baudrate for UART operation */
Cy_SysClk_PeriphSetDivider (UART_CLK_DIV_TYPE, UART_CLK_DIV_NUMBER, 35UL);
/* Initialize the UART operation */
uart_status = Cy_SCB_UART_Init(UART_HW, &UART_config, &UART_context);
Figure 2 Printing on the serial terminal