Change PSoC™ 4 UART baud rate in PSoC™ Creator – KBA234803
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Community Translation: PSoC™ CreatorでPSoC™ 4のUARTボーレートを変更 – KBA234803
The UART baud rate is determined by the clock that drives the SCB component, and depends on the clock divider value (clkDivider) calculated using Equation 1:
The following example demonstrates how to change the UART baud rate in run time. This example shows how to calculate and implement the clock divider value to achieve a target baud rate of 115,200 bps.
- Place a UART component in the top design (*.cysch) in the PSoC™ Creator project.
- Enable the clock (Clock_1) as shown in Figure 1:
Figure 1 *.cysch component - Make the following settings in the UART component configuration for this example. See Figure 2:
Figure 2 UART component configuration
- HFCLK (high-speed clock): 24 MHz
- Oversample: 13
- Target baud rate: 115,200 bps
5.Use the calculated value minus one (16–1 in this case) in the API to configure the clock as shown in the code snippet in the main.c file:
Clock_1_SetFractionalDividerRegister(15,0); //UART baud rate 115200 16-1
Code Listing 1/* Start SCB (UART mode) operation */
Clock_1_Stop();
if(uartboaudrate115200)
{
Clock_1_SetFractionalDividerRegister(15,0); //UART baud rate 115200 16-1
}
else
{
if(uartboaudrate9600)
{
Clock_1_SetFractionalDividerRegister(199,0); //UART baud rate 9600 200-1
}
}
Clock_1_Start();
UART_Start();
while(1)
{
UART_UartPutString("This is SCB_UartComm custom baudrate example project\r\n");
UART_UartPutString("\r\n");
CyDelay(500);
}Figure 3 shows the test result:
Figure 3 Test result