CYPD3177 EZ-PD BCR Device Firmware Updates - KBA231981
The original version of the firmware programmed on the CYPD3177 EZ-PD™ BCR devices older than date code (YYWW format – last two digits of the year, and two digits of the work week) “2047” is version 3.0C. The updated firmware version that the CYPD3177 devices have with the date code “2047” or later, is version 4.05. The updates incorporated in firmware version 4.05 are listed in Table 1.
Table 1. List of updates incorporated in EZ-PDTM BCR device (CYPD3177) firmware version 4.05
Device heating up in overvoltage condition
When the BCR device is used with non-compliant Type-C power sources which do not shut VBUS off in an overvoltage condition, the BCR device will continuously draw current from VBUS via the VBUS_IN pin (pin 18 of CYPD3177). This causes an increase in power dissipation when the BCR device uses the original BCR firmware, further resulting in device overheating.
It is important to note that this issue is not observed when compliant PD and Type-C power sources are used with the BCR device.
This issue is now fixed in the updated firmware.
SAFE_PWR path does not detect VBUS over-voltage conditions
The original BCR firmware did not have OVP enabled in the SAFE_PWR path, so the BCR device would not turn off the SAFE_PWR FETs to protect the system sub-circuit that is powered through the SAFE_PWR path in an over-voltage condition. This could result in lack of overvoltage protection on the SAFE_PWR path in rare instances where the USB-C power adapter also lacks overvoltage protection.
In the updated BCR firmware, OVP condition detection is enabled in the SAFE_PWR path.
VBUS_MIN setting is ignored when the BCR device is connected to non-PD, 5V-only power adapters (for example: Type-C Only power adapters)
In the original firmware version, when a non-PD power adapter is connected to the BCR device, the firmware always sets the VBUS_MIN value to 5V regardless of the VBUS_MIN GPIO resistor divider setting. This could potentially allow a power-limited power source to attempt to power the system.
In the updated firmware, the sink path is disabled for non-PD, 5V-only power adapters when VBUS_MIN is set to a voltage greater than 5V.
FW updates based on USB-PD Spec
Minor firmware updates were done to meet the latest USB-PD compliance tests. This does not affect the device functionality. The firmware was also upgraded to support USBPD 3.0 Version 2, D_ID acknowledge with Type-C connector type. The default connector type is set to ‘receptacle’ and is changeable over the HPI interface.
Reduced active power consumption
The updated firmware allows the CYPD3177 devices to go to sleep when there is no PD or I2C communication. This reduces the active power consumed by the device.
Device heating up in the event of a particular sequence following a FAULT scenario.
The original BCR firmware caused an increase in current consumption when the capabilities mismatch got resolved by reconfiguring the PDOs over HPI. This issue is resolved in the updated BCR firmware.
SAFE_PWR FET output could go higher than 5V momentarily when the host processor introduces a capabilities mismatch.
When the current power contract is greater than 5V, and the host processor introduced a capabilities mismatch by overriding the hardware settings for VBUS_MIN and VBUS_MAX, the SAFE_PWR FET would momentarily output a voltage that is equal to the current power contract before providing the expected 5V output on the SAFE_PWR FET.
A simple workaround for this is to ensure that the host processor never introduces the capabilities mismatch after making a successful power contract.
This issue is fixed in the updated firmware.
When Safe Power is negotiated with the power adapter, the BCR device requests the maximum available current instead of 900mA as documented in the BCR datasheet.
During a capabilities mismatch scenario, a 5V contract was established to provide the safe power voltage of 5V to the sink. During this condition in the original BCR firmware, the BCR device requested the maximum available current instead of 900mA.
A workaround is not needed because the current requested was greater than 900mA as documented in the BCR datasheet, and most of the power adapters will support 900mA current.
This issue is fixed the updated firmware.
Made f/w changes to make the UFP VDO data capable to support products that present a USB interface in addition to a UFP power sink interface.
The data capability will be determined by either the presence or the value of the pull-up resistor connected to the FLIP pin. Added a FLIP pin strap feature to change the USB communication bit and UFP VDO. See Table 2 for details on the pull-up resistor value and the data capability bit being presented.
Legacy applications that did not utilize the FLIP pin and were intended to be power sinks only should not see any changes in normal operation since data-capable UFP sinks are also capable of sinking power.
The default UFP VDO, when the port is set to be data-capable, will corelate to the port being capable of USB 2.0 data in peripheral mode with a Type-C receptacle with no alternate mode support. The contents of the UFP VDO can be modified over the HPI interface by using a non-volatile write command. See the latest BCR HPI Specification for more details.
Table 2. FLIP Pin Pull-Up Resistor value and the Data Capability Bit Being Presented
Pull-Up Resistor Value
Data Capability Bit Presented as a part of UFP VDO
No pull-up resistor (FLIP pin is floating)
1, which corelates to the port that is USB data-capable
0, which corelates to the port that is not data-capable