Translation - Japanese: CX3ハードウェア：よくある質問 - KBA91295 - Community Translated (JA)
Question: Is it possible to use a single clock source for CX3?
Answer: Yes. It is possible to use a single clock source of 19.2 MHz. This clock input must be connected to the “REFCLK” and “CLKIN” pins. The “CLKIN32” is an optional signal. This needs to be supplied with the 32-kHz clock input if you want to use the “watchdog” feature.
Question: Can CX3 provide a “Clock out” which can be used as a “Clock input” for an image sensor or image signal processor?
Answer: CX3 provides a clock output signal “MCLK” only for testing the image sensor. This signal is not suitable to use in final product. For production, use an external clock generator as clock input for image sensors.
Question: How much current does CX3 draw from the USB VBUS supply?
Answer: The total current CX3 draws from the 5-V source in normal mode is approximately 112.6 mA. This is the worst-case scenario (1080p at 30fps, 24-bit data bus, 6 V at VBUS, 3.6 V for I/O supply, 1.25 V for Core / USB 3.0 supply).
Note: These values are based on the following criteria summarized in the table below. This assumes using switching regulators with approximately 85% efficiency for 5 V to 1.2 V, 1.8 V, or 3.3 V conversion.
|Parameter||Voltage (V)||Current (mA)||Power (W)||External Power Converter Efficiency||Input Power (W)|
|Current from VBUS||5||112.6|
If you use only the USB 2.0 port of CX3, then the current drawn is approximately 98.6 mA. When the device is in the standby mode, it draws approximately 68 uA; in the suspend mode, it draws approximately 3.2 mA.
Question: Do OmniVision® image sensors such as OV5640 and OV10822 with Serial Camera Control Bus (SCCB) port work with CX3?
Answer: The OmniVision SCCB standard is expected to treat the “Ack” bit as a ‘don’t care’ (and therefore have the transaction continue without checking for errors). However, OV sensors do set the “Ack” bit after each transaction. This works well with CX3’s I2C master.
Question: Does CX3 support image sensors with parallel or serial low-voltage differential signaling (LVDS), sub-LVDS, or high-speed pixel interface (HiSPi) interfaces?
Answer: No. CX3 supports only the Mobile Industry Processor Interface (MIPI) Camera Serial Interface (CSI)-2 image sensors.
If you require interfacing image sensors with parallel interfaces, you should use Cypress FX3. In addition, image sensors with serial LVDS, sub-LVDS, or HiSPi interfaces can be interfaced to FX3 using external serial LVDS-to-Parallel converters, FPGAs or Image Signal Processors (ISP).
You can use the following kit from “LATTICE SEMICONDUCTOR” that has FPGA + Cypress FX3 for the same http://www.latticesemi.com/en/Products/DevelopmentBoardsAndKits/
Lattice has IPs for the LVDS (HiSPi, SubLVDS) to parallel bridge. Using this, you can convert the LVDS to parallel bus and then Connect to FX3's GPIF interface.
Question: Is it possible to connect two MIPI CSI-2 image sensors that have one or two lanes with one CX3? Does CX3 support the Virtual Channel (VC) feature of MIPI CSI-2 Specification?
Answer: No. It is not possible to connect two image sensors to one CX3. You need an external ISP with two image sensor input channels and one MIPI CSI-2 output interface to connect two sensors to one CX3. CX3 does not support the Virtual Channel (VC) feature of MIPI CSI-2 Specification.
If you want to use only one of the two image sensors at a time, you can use a MIPI CSI switch. See https://www.fairchildsemi.com/datasheets/FS/FSA642.pdf
Question: Does CX3 have some method to control an LED using PWM? Will it need additional microcontroller for this?
Answer: CX3 has GPIOs that can provide PWM output. CX3’s built-in microcontroller can be used to control the LED using PWM output. See the FX3 Technical Reference Manual (TRM) document to understand how to use PWM function.
Question: What are the routing guidelines to be followed while routing the MIPI CSI-2 lines?
Answer: The “AN70707 - FX3 / FX3S Hardware Design Guidelines” application note discusses recommended practices for FX3/FX3S hardware design, which are also applicable to CX3.
For MIPI CSI-2 signals, use the following additional routing guidelines:
Question: Where can I find reference schematics for CX3 Reference Design Kit (CX3 RDK)?
Answer: The Reference design kit for CX3 is manufactured and sold by one of the Cypress design partner, e-con Systems. The CX3 RDK can be bought from their online store using the link below. The CX3 RDK schematics can also be downloaded from the “Documents” section on the same web page. http://www.e-consystems.com/CX3-Reference-Design-Kit.asp
Question: Does CX3 have any test signals that can be brought to test pins for debugging?
Answer: Yes. You can provide a test point for the following signals. This is helpful in debugging the MIPI CSI-2 receiver configuration for various image sensors. Ensure that these test points are provided closer to the pins to avoid a longer trace length.
|CX3 pin#||Test Signal Name|
|H8||PCLK test signal|
|G6||HSYNC test signal|
|H5||VSYNC test signal|
Additionally, the Rx and Tx lines of the serial port (E4 - UART_RX, E5 - UART_TX) can be brought out to test points to help debugging.
Question: How can we make our own Image Sensor daughter card for the CX3 reference design kit (RDK)?
Answer: You can make your own Image sensor daughter cards for CX3 RDK. The figure given below has the dimensions of the fixing holes of the CX3 RDK main board and the connector. The mounting hole drill size is 3.2 mm.
The schematics of the OV5640 sensor daughterboard is available for download from e-con systems website. (http://www.e-consystems.com/CX3-Reference-Design-Kit.asp).
Question: We made our own daughter card for CX3 RDK. However, the I2C communication between CX3 and the image sensor is not working. How do I fix this issue?
Answer: There is an I2C buffer in CX3 RDK main board. The output power of this buffer has to come from the daughter card. The absence of a 2.8-V supply to the I2C buffer output section will result in I2C communication failure. If you provide 2.8 V to the Pin15 of the interface connector, it should work.
Question: Will CX3 support “Continuous MIPI clock” and “gated MIPI clock” modes?
Answer: Yes. CX3 support both clock modes. The CX3 chip recognizes the CSI clock by MIPI CSI LP to HS mode transition at the beginning. Therefore, after finishing the initialization of the CX3 MIPI bridge, the CSI clock must transit from LP to HS mode. You should use the following sequence in firmware if you are using the sensor in “continuous clock mode.”
Question: What is the value of the termination resistor to be used on the MIPI CSI lines?
Answer: MIPI DPHY used for MIPI CSI-2 has an internal 100-Ω termination resistor that will be actively switched during the HS (high-speed) mode. You do not need to connect any external resistors on these lines.
Question: Do you have board design examples that show a reference layout and routing for a CX3 board?
Answer: You can find the reference schematics and board file of a CX3 board in cadence Allegro (Rev 16.5) format (CYPRESS_CX3_REFERENCE_DESIGN_SCHEMATIC_17SEP14_CX3.DSN) and board file (CX3_REFERENCE_DESIGN_Board_17SEP14_CX3.brd) attached.
The OrCAD Symbol for CX3 is also available for download in the link below:
Question: Where can I find the IBIS model for the CX3?
Answer: The IBIS model for CX3 is available for download from the link below:
Question: Can we leave the unused MIPI CSI-2 data lanes of CX3 floating?
Answer: No. The unused MIPI CSI-2 data lanes of CX3 must be connected to ground. For example, if you use an image sensor with one MIPI CSI-2 lane, you should connect the second, third, and fourth MIPI CSI-2 data lanes of the CX3 to Ground.