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CAPSENSE™ GND loop problem and noisy RawCounts - KBA236220

CAPSENSE™ GND loop problem and noisy RawCounts - KBA236220

Infineon_Team
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Community Translation: CAPSENSE™ GND ループの問題とノイズの多い RawCounts - KBA236220

Version: **

Question: What is the GND loop problem in CAPSENSE™, and how can it be solved? Why are RawCounts in IDAC Sourcing mode noisy in such a situation? Why does this noisy RawCounts output improve as soon as IDAC mode is changed to IDAC Sinking mode?

Answer:

GND Loop Problem: The situation that arises when the CMOD Ground, CSH_TANK Ground, and Sensor Ground are connected to the Central point through a very long trace length known as GND loop problem. It makes the system vulnerable as noise can easily creep into the system because of the long trace length. It is recommended to have the shortest path possible for the GND connection from the supply to the PSoC™ devices.

Following are the layout recommendations to remedy GND loop problem:

  • If the Ground Planes are present on different layers then they should be stitched together as much as possible, based on The PCB manufacturing cost, because it will lead to lower ground inductance and the potential difference between chip ground and supply ground will be minimal, which is very important in situations where the high current is sinking through the ground eg: when the radio is operational.
  • We recommend having separate decoupling capacitors connected to VDDD and VDDA, and If there are two VDDD pins, each VDDD pin must be separately connected with its corresponding decoupling capacitors. Also, decoupling capacitors and CAPSENSE™ series resistor should not be placed more than 10-mm away from the pin.
  • We recommend keeping VSSD (Digital GND) and VSSA (Analog Ground) separate because if any noise gets injected into the digital domain, it will get coupled with the analog domain and affect the CAPSENSE™ output.
  • In CAPSENSE™, every Ground Plane should be implemented in star connection to a central point. All the GND traces should come at one central point; from there, only one return path should be there to supply GND and be as short as possible. Star connection implementation is mandatory because if we have multiple GND traces going to source GND, more traces are susceptible to noise, rendering our system vulnerable to noise. If star connection is implemented, then there will be only one trace going back to Supply GND, reducing the system's noise vulnerability significantly.
  • CAPSENSE™ Ground planes should have an inductance less than 0.2-nH from the central point. To achieve this, CMOD, CINTX, CSH_TANK capacitor pads should be placed close to the chip, and the Ground Planes should be thick.
  • The hatch ground for all the sensors, the ground plane for CMOD, CINTX, and the ground plane for CSH_TANK must terminate at the central point.

Figure 1 explains the star connection. The central point for different families is mentioned in Table 1.

Infineon_Team_0-1666948633496.pngFigure 1 Star connection for Ground
 

Table 1:  Central point for star connection

Family

Central point

PSoC™ 4000

VSS pin

PSoC™ 4100/4100M

VSS pin

PSoC™ 4200/4200M/4200L/PSoC™ 4-S/PSoC™ 4100PS

VSS pin

PSoC™ 4100-BL

E-pad

PSoC™ 4200-BL

E-pad

 

Using packages without E-pad

When not using the E-pad, the VSS pin should be the central point and the only return path to the supply ground. High-level layout diagrams of the top and bottom layers of a board when using a chip without the Epad are shown in Figure 2 and Figure 3.

Figure 2 PCB top layer layout using a chip without E-pad.png

 Figure 2 PCB top layer layout using a chip without E-pad

Figure 3 PCB top layer layout using a chip without E-pad.pngFigure 3 PCB top layer layout using a chip without E-pad

If the layout cannot be changed, implement the following software workaround:

When a Ground Loop problem exists in the system, the noise easily creeps into the system, and then the Ground is actually at some potential concerning the central point and is not at 0 V, which it should be. Because of this, we see noisy RawCounts in IDAC Sourcing mode. To understand why the RawCounts response becomes better in IDAC Sinking mode as compared to IDAC Sourcing mode, Let’s discuss the differences between IDAC Sourcing mode and IDAC Sinking mode.

IDAC Sourcing vs IDAC Sinking

1. IDAC Sourcing mode:  In IDAC Sourcing mode, the voltage across sensor capacitance sources from ground to VREF as shown in Figure 4.

Figure 4 Voltage across sensor capacitance.pngFigure 4 Voltage across sensor capacitance

2. IDAC Sinking mode:  In IDAC Sinking mode, the voltage across sensor capacitance sinks from VDDD to VREF as shown in Figure 5.

Figure 5 Voltage across sensor capacitance.pngFigure 5 Voltage across sensor capacitance

As it can be seen, In IDAC Sourcing mode the Voltage across sensor capacitance varies from GND to VREF. When the Ground loop problem exists in the system, the Ground is at some potential concerning the central point and is not at 0 V. This noise at the GND level gets amplified in IDAC Sourcing mode, and we see noisy RawCount output in IDAC Souring mode. This is circumvented by choosing IDAC sinking method because even if the Ground is noisy (Ground is at some potential concerning the central point due to noise), it does not give a noisy RawCount response as in IDAC Sinking mode; the voltage sinks from VDDD to VREF which is not affected by the noise in the Ground.

Note: In the IDAC Sinking mode, charging is done directly through VDDD, which is more susceptible to power supply noise than sourcing mode. Hence, LDO/stable VDD is to be used when working in Sinking mode.

Thus, the RawCounts response improves when we change IDAC mode from Sourcing to Sinking.

 

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