Community Translation(JP): AURIX™ MCU: DFlashのWAITステータスまたはサイクル - KBA236267
Version: **
The wait states or cycles is defined as the time between the command input and a stable output. For example, a read command to the DFlash.where the input is the address provided by the CPU and the output is the data provided by the DFlash. The CPU is much faster in the operation than the DFlash, has to wait a certain amount of time (i.e., wait cycles) for the data. To ensure the data correctness and consistency, proper wait states need to be configured in the predefined registers. The right configuration of the wait states or cycles becomes more important in case of a microcontroller operating at high temperature. It is often observed that the short-configured wait states or cycles do not harm under normal or good conditions, but under border conditions this leads to corrupted data, which is later discovered in the field. The following description shows how to calculate the wait states for DFlash of AURIX™ TC3xx device.
The fFSI value can be derived from the system clock configuration, the usual configuration value is 100 MHz. The other values tDF and tDFECC are derivedfrom the datasheet.
Last step is to set the calculated values in the corresponding register.
In the case of using MCAL FLS driver, the wait states or cycles can be configured in the MCAL configuration tool by considering the following two parameters,
FlsWaitStateRead = HF_DWAIT.RFLASH and FlsWaitStateErrorCorrection = HF_DWAIT.ECC.
Note: This KBA applies to the following series of AURIX™ MCUs:
- AURIX™ TC3xx series