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AURIX™ MCU: Reading Erased PFlash and DFlash – KBA235309

AURIX™ MCU: Reading Erased PFlash and DFlash – KBA235309

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AURIX™ MCU: Reading Erased PFlash and DFlash – KBA235309

Version: **

In the AURIX™ family, the PFlash ECC mechanism implements a safety ECC methodology by default. If PFlash is erased, both the PFlash address region and its associated ECC code are erased to the '0' value. An all '0' ECC code is not a valid code for an all '0' PFlash memory because the ECC code incorporates more information (as a mechanism). Reading the address in the erased state generates an ECC error. The same behavior does not apply for erased DFlash, since the ECC code only considers the data. An all ‘0’ data has a valid ECC code of all ‘0’.

For more details, see the following sections of the User’s manuals:

  • For AURIX™ TC2xx devices: “Program Memory Unit (PMU)” section
  • For AURIX™ TC3xx devices: “Non Volatile Memory (NVM) Subsystem” section


Note: This KBA applies to the following series of AURIX™ MCUs:

  • AURIX™ TC2xx series
  • AURIX™ TC3xx series
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