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AURIX™ MCU: Interfacing FPGAs from Xilinx– KBA234426

AURIX™ MCU: Interfacing FPGAs from Xilinx– KBA234426

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Version: **

There are two ways to interface AURIX MCUs with Xilinx FPGAs.

  1. AURIX derivatives with on-chip HSSL (High Speed Serial Link) module

Use the logiHSSL IP core or “LogiHSSL HSSL Slave Controller” from Xylon to enable the HSSL interface with certain Xilinx FPGAs. See  https://www.logicbricks.com/Products/logiHSSL.aspx for more information. For information on the development kit from Xylon to support the design, see www.logicbricks.com/products/logiHSSL-ZU.aspx.

  1. For AURIX derivatives with on-chip EBU (External Bus Unit)

Use the EBU to interface the Xilinx FPGAs.

See the “High Speed Serial Link (HSSL)” and “External Bus Interface (EBU)” sections of user’s manual for more information on registers.

Note: This KBA applies to the following series of AURIX MCUs

  • AURIX TC2xx series
  • AURIX TC3xx series
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