AURIX™ MCU: How to design the circuit for HSSL - KBA234671
Community Manager
Mar 14, 2022
05:18 AM
- Subscribe to RSS Feed
- Mark as New
- Mark as Read
- Bookmark
- Subscribe
- Printer Friendly Page
- Report Inappropriate Content
Mar 14, 2022
05:18 AM
Community Translation: AURIX™ MCU: HSSLの回路設計方法 – KBA234671
Version: **
For High Speed Serial Link (HSSL), make the following connections:
- Connect LVDS Master-TX to Slave-RX.
- Connect Master-RX to Slave-TX.
- Connect SysClk from the master to the slave.
- Clock the master with the crystal.
- Clock the slave from master SysClk.
- Provide either external termination (provides more flexibility) or internal termination (default).
For more details on designing a circuit for a HSSL, see the “High Speed Serial Link (HSSL)" sections of the User’s manual.
Note:
This KBA applies to the following series of AURIX™ MCUs:
- AURIX™ TC2xx series
- AURIX™ TC3xx series
Labels
Rate this article: