Community Translation: AURIX™ MCU: 割込み優先順位をいくつ設定できますか? - KBA234789
Version: **
In the AURIX™ MCU, the DMA module and each CPU core have 255 interrupt priority levels.
For more details, see the “Interrupt Router (IR)” section in the user’s manual.
Note: This KBA applies to the following series of AURIX™ MCUs:
- AURIX™ TC2xx series
- AURIX™ TC3xx series
