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AURIX™ MCU: Debug code when a trap is asserted - KBA234672

AURIX™ MCU: Debug code when a trap is asserted - KBA234672

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Community Translation: AURIX™ MCU: トラップがアサートされた時のデバッグコード – KBA234672

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For Tricore™/AURIX™ MCUs, the most common traps are Class 2 (instruction errors) and Class 4 (system bus and peripheral errors).

Do the following to debug your code:

  1. Put one or more breakpoints for the trap class in the Trap vector table (i.e., Class 2 and Class 4). The BTV (Base Trap Vector Table Pointer) register specifies the base address of the trap vector table.
  2. Reset and run your code. If a Class 2 or Class 4 trap is asserted, program execution stops at that breakpoint.
  3. Check register D[15] for the Trap Identification Number (TIN).
  4. Check register A[11] for the address of the instruction triggering the trap. For a synchronous trap, the return address A[11] is the instruction that caused the trap.

For more details, see the “Trap System” section in the Tricore™ Core architecture user manual (Volume 1).

Note:

This KBA applies to the following series of AURIX™ MCUs:

  • AURIX™ TC2xx series
  • AURIX™ TC3xx series
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