AURIX™ MCU: Are CPU RAMs accessible before multi-core startup is complete? – KBA235347
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Jun 20, 2022
02:57 AM
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Jun 20, 2022
02:57 AM
Version: **
CPU RAMs, such as DSPR, and PSPR, can be accessed even before CPU startup is complete. For example, you can access CPU1 DSPR/PSPR before the startup of CPU1.
For more details, please see the “CPU Subsystem” section of the User’s manual.
Note:
This KBA applies to the following series of AURIX™ MCUs:
- AURIX™ TC2xx series
- AURIX™ TC3xx series
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- Tags:
- CPU Subsystem
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