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User17676
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Mar 22, 2020
11:50 PM
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Mar 27, 2020
08:48 AM
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Hi MonacoFranz,
The gate capacitance Cge is designed to be large enough to avoid parasitic turn-on effects.
This negates the need for additional gate capacitors.
IGBT7 T7 is designed for zero voltage turn-off.
Besides, the ratio of input capacitor is optimized to avoid parasitic turn-on.
Gate driver circuit can be simplified, which means there is no need to use active miller clamping or shunt path for miller current.
More details you can find here.
BR
The gate capacitance Cge is designed to be large enough to avoid parasitic turn-on effects.
This negates the need for additional gate capacitors.
IGBT7 T7 is designed for zero voltage turn-off.
Besides, the ratio of input capacitor is optimized to avoid parasitic turn-on.
Gate driver circuit can be simplified, which means there is no need to use active miller clamping or shunt path for miller current.
More details you can find here.
BR
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Moderator

Moderator
Mar 27, 2020
08:48 AM
- Mark as New
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Hi MonacoFranz,
The gate capacitance Cge is designed to be large enough to avoid parasitic turn-on effects.
This negates the need for additional gate capacitors.
IGBT7 T7 is designed for zero voltage turn-off.
Besides, the ratio of input capacitor is optimized to avoid parasitic turn-on.
Gate driver circuit can be simplified, which means there is no need to use active miller clamping or shunt path for miller current.
More details you can find here.
BR
The gate capacitance Cge is designed to be large enough to avoid parasitic turn-on effects.
This negates the need for additional gate capacitors.
IGBT7 T7 is designed for zero voltage turn-off.
Besides, the ratio of input capacitor is optimized to avoid parasitic turn-on.
Gate driver circuit can be simplified, which means there is no need to use active miller clamping or shunt path for miller current.
More details you can find here.
BR