Isolated gate driver power supply

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Sriram_07
Level 2
Level 2
10 questions asked 25 sign-ins 10 likes given

Hello, 

I am building my prototype motor controller for a pmsm motor and i am following the infineon 22kw inverter reference design. In that design i have some doubts regarding the isolated gate driver power supply. I make a pcb for that module but i am not getting proper output . ( I bypassed the STO and gave 15 V to the 50% duty IC) .Can

someone expPicture3.pnglain that half bridge converter configuration used in the ref design, it will be very helpful for me

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1 Solution
1211Shukla
Moderator
Moderator
Moderator
100 replies posted 10 likes received 25 solutions authored

Hi,

Topology  shown in the schematic is a typical half bridge configuration. 

1211Shukla_0-1664434364036.png

If you see the Fig. above, positive of the transformer is connected to switches and neutral is connected to mid point of the DC supply (V = 7.5V). When the Q1 is on positive of transformer primary wdg would be connected to 15V and when Q2 is on same would be connected to GND. Considering the transformer ratio 1 : 1.2 : 1.2 Voltage level  across N2 & N3 will be a little higher.  you will get voltage waveforms  as shown in below fig.

1211Shukla_1-1664434679658.png

Now secondary side circuit will function as a rectifier only, where you will get a stiff DC voltage at the output.

I am also attaching the waveforms of secondary side, where green trace is transformer sec voltage, blue trace is voltage across D3 & D5 and red is the output voltage i.e.  VCC_WH, VCC_VH, VCC_L & VCC_UH

1211Shukla_0-1664435284416.png

Regards,

Rishabh

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3 Replies
1211Shukla
Moderator
Moderator
Moderator
100 replies posted 10 likes received 25 solutions authored

Hi,

Topology  shown in the schematic is a typical half bridge configuration. 

1211Shukla_0-1664434364036.png

If you see the Fig. above, positive of the transformer is connected to switches and neutral is connected to mid point of the DC supply (V = 7.5V). When the Q1 is on positive of transformer primary wdg would be connected to 15V and when Q2 is on same would be connected to GND. Considering the transformer ratio 1 : 1.2 : 1.2 Voltage level  across N2 & N3 will be a little higher.  you will get voltage waveforms  as shown in below fig.

1211Shukla_1-1664434679658.png

Now secondary side circuit will function as a rectifier only, where you will get a stiff DC voltage at the output.

I am also attaching the waveforms of secondary side, where green trace is transformer sec voltage, blue trace is voltage across D3 & D5 and red is the output voltage i.e.  VCC_WH, VCC_VH, VCC_L & VCC_UH

1211Shukla_0-1664435284416.png

Regards,

Rishabh

From the ref design i am supposed to get 15 V across the four output terminals right? I build the circuit and i am getting 17 V across the output terminals . Is that expected or if i want to get 15 V should i use a 1:1:1 transformer

Thanks for the detailed reply

Is it possible to get the ltspice model of this circuit. I have been trying to simulate it but i couldnt get the spice model of the 50% duty cycle driver ic

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1211Shukla
Moderator
Moderator
Moderator
100 replies posted 10 likes received 25 solutions authored

Hi,

Transformer ratio of 1 : 1.2 : 1.2 has been taken to overcome the voltage drop due to transformer leakage inductance and forward diode drop. However you can choose a specific transformer ratio based on your circuit requirement.

The half bridge driver AUIR2085S is almost ten years old product thus no one bothered to create a spice model for it, even though you can simulate the circuit behavior by generating a 50% duty cycle pulses at your desired frequency. 

Regards,

Rishabh

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