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Desheng_Zhang
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Hi, in multi-phase systems, what problems will be caused by simultaneous multi-phase switching operation?
Taking three-phase two-level inverter as an example, generally, only one phase leg will be switched to the upper/lower DC rail. But what problems will be caused if two- or three-phase legs are switched to the upper/lower DC rail at the same time?
Stronger EMI?

For example, simultaneous three-phase switching operations will occur at the boundaries of the carrier periods when using single-edge modulation as shown in the attached Figure.

SE.png

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BandaruAkhil
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25 likes received 5 likes given 25 solutions authored

Hi @Desheng_Zhang,

 

Conventional PWM techniques (like SVPWM) shall switch in the below switching pattern. 

BandaruAkhil_0-1673865994666.png

If you observe the above PWM pattern, transition of the switches shall happen one leg at a time.

Practically, we won't turn off all three leg switches simultaneously. Please specify the application for which you require the forced PWM switching pattern.

Switches will experience significant stresses as a result of the high di/dt and dv/dt that will result from hard switching, as you described.

The traditional hard switching inverter has a number of drawbacks, including high switching power losses, high device stresses, poor performance, low efficiency, and EMI production from high di/dt and high dv/dt due to fast transitions.

Please go through the attached reference.

View solution in original post

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BandaruAkhil
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25 likes received 5 likes given 25 solutions authored

Hi @Desheng_Zhang 

I have noted your query and I will be working on it.

 

Best Regards,

Akhil Kumar.

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Thanks for your attention. Switching two or more phases at the same time may be problematic in the sense of noise generation. I have met a problem that motor vibration sensors cannot work properly when there are simultaneous multi-phase switching operations generated, perhaps due to stronger EMI.
In addition, I think simultaneous multi-phase switching operations may have more disadvantages, such as larger di/dt, larger voltage spikes, bad common-mode behaviors, and perhaps challenges to the tolerable voltage of the power device.
However, I was not able to find the relevant literature in IEEE Xplore. Maybe this issue should be given enough attention in industry and I am very much looking forward to your reply! Thanks!

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BandaruAkhil
Moderator
Moderator
Moderator
25 likes received 5 likes given 25 solutions authored

Hi @Desheng_Zhang,

 

Conventional PWM techniques (like SVPWM) shall switch in the below switching pattern. 

BandaruAkhil_0-1673865994666.png

If you observe the above PWM pattern, transition of the switches shall happen one leg at a time.

Practically, we won't turn off all three leg switches simultaneously. Please specify the application for which you require the forced PWM switching pattern.

Switches will experience significant stresses as a result of the high di/dt and dv/dt that will result from hard switching, as you described.

The traditional hard switching inverter has a number of drawbacks, including high switching power losses, high device stresses, poor performance, low efficiency, and EMI production from high di/dt and high dv/dt due to fast transitions.

Please go through the attached reference.

0 Likes