I am trying to bring up a board with HyperRAM memory solution (2x S70KS1281DPBHV02) . However I see read bit errors when running at 144MHz (but all works OK at 72MHz).
AN211622 says to match the length of RWDS to DQ +/-25mils.
Is this a real requirement? It seems a very tight constraint for a 144MHz bus.
The datasheet sets tDSS as +/-0.45ns - which still seems a tight requirement. However it is the same requirement all frequencies - so probably not related to my issue?
Does anybody know of a real reference design for HyperRAM?Show Less
I've got a problem, because when writting on HyperRam, I have the good waveforms for DQ,RWDS,CS and CK.
When writting a value and reading it back in the memory, it reads the good value I wrote before.
But, it also writes to the next colum ( for example if I write to page 0, colum 0, it also writes the value to page 0 colum 2, and when I write to page 0 colum 2, it also writes the value to page 0 colum 0).
I thougth that it could cane from the configuration register in HyperRam (but I'm not sure).
When reading the ID register, I have a value of 0C90, which is really strange (Manufacturer bits are reserved) and a value of configuration register of 1B6E, which also seems strange.
And when I want to write to this configuration register, I ignores the modifications.
Do you have any idea where the problem could come from ?
I am trying to use hyperRAM in TE0725 board ...so I want to configure hyperRAM with microblaze core in xilinx vivado 2015.4 (webpack version)......... using your hyperRAM verilog file I have created IP (.xci) form......but after that I am not getting how to configure full IP ..... till now I am working on DDR3 RAM in Arty board ,............so please can you help me out how to configure it , send and receiver data through it......alsoI want one more thing to mention that when I have created IP it shows 198% of IO's (input/output)....can you explain this also....
maiL ID ---- firstname.lastname@example.orgShow Less
’HyperBus Chipset Support’ にはXilinx Zynq7000でHyperRAMもHyperFLASHもサポートされると表示されています。
I'm building various boards as a hobby. Recently I've built the board with Xilinx Artix-7 FPGA and two of HyperRAM ICs (here is what it looks like), and I wonder if it's possible for hobbyists like me to get access to your HyperBus Controller IP for FPGAs, and if so - what do I need to do to receive it. Thank you!Show Less