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I'm interested in using an ARM microprocessor with a HyperBus interface attached to an FPGA; where the FPGA is a slave device with memory mapped registers that act as an extension of memory space to the uProc. Does Cypress support this type of configuration? If so; is there a reference design or IP package available?
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Hi,
Could you please let us know the Cypress HyperBus devices that you use in your application?
Thanks and Regards,
Sudheesh
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The design is just in the planning stages but I'm looking into using a PSoC 6 as the processor. The answer to this question will either lock in the PSoC or eliminate it as a potential candidate.
Also I'm currently using an S29GL01GT10 parallel bus flash for a small low power wireless sensor application and have used PSoC 5 for previous designs.
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Hi,
PSoC6 does not have HyperBus interface, so you won't be able to use it in your application.
Thanks and Regards,
Sudheesh
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Ok, good to know... PSoC6 doesn't support HyperBus.
Is there any chance you could answer the question about the FPGA as a HyperBus slave? If not; I can just take Cypress off the list and move on. You will miss out on an opportunity to sell your product. No impact to me; I'll find a different solution.
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Hi,
Sorry for the delay in my response.
Please contact your FPGA manufacturer for assistance to use FPGA as a HyperBus slave device.
Thanks and Regards,
Sudheesh
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Hi Keith Padgett,
I apologize for locking this thread without waiting for your response. I will clarify my previous response.
Cypress does not manufacture any FPGA devices and we won't be assist you with using an FPGA as a HyperBus slave. That is why I suggested you to contact your FPGA manufacturer to use it as a HyperBus slave. Please provide more details about your requirement, if I misunderstood your query.
Thanks and Regards,
Sudheesh
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Thank you for the clarification and re-opening the thread; but it's still pretty much a "non-answer". I did not ask if Cypress manufactures FPGA devices.
Cypress does provide IP for use in other manufacturers FPGA devices. I know this for a fact because I have downloaded the IP.
The original question was a two part question:
1) Does Cypress support this type of configuration? (i.e. Using an FPGA as a HyperBus slave)
2) If so; is there a reference design or IP package available?
At this point, I have completely written off getting any useful information out of this thread. I assume the answer is, NO, Cypress does not have IP to support using an FPGA as a HyperBus slave.
Please, in the future, read the question! Then provide an intelligent response.
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Hi Keith Padgett,
Sorry, I misunderstood your query. Please find my comments below.
Yes, Cypress has a HyperBus IP package. It can be used to configure any FPGAs as a HyperBus master, not as a slave. So, you won't be able to use it in your application.
I apologize for the inconvenience caused to you.
Thanks and Regards,
Sudheesh